| Commit message (Collapse) | Author | Age | Files | Lines |
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Enable NOR for phyCORE-i.MX6 DualLite and Quad eMMC variants.
Furthermore add an extra 'status = "disabled"' in the flash node. It
has no functional effect, because the SPI bus node 'ecspi1' is disabled,
too.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add Phytec phyCORE-i.MX6 SOM.
Support:
- imx6dl-phytec-phycore-som-emmc:
- 1GB RAM on 1 Bank with 64Bit
- 10/100MBit Ethernet
- SPI NOR
- eMMC
- SD
- UART
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add missing MMC barebox environment partitions for the phyCORE-i.MX6
with EMMC. Otherwise the barebox cannot find the environment, when the
board is boot from sd-card.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use a longer reset time for ethernet phy Micrel KSZ9031RNX. Otherwise a
small percentage of modules have 'transmission timeouts' errors like
barebox@Phytec phyFLEX-i.MX6 Quad Carrier-Board:/ ifup eth0
warning: No MAC address set. Using random address 7e:94:4d:02:f8:f3
eth0: 1000Mbps full duplex link detected
eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Due to hardware issues the usdhc3 interface on phyBOARD-ALCOR i.MX6 and
phyBOARD-SUBRA i.MX6 doesn't work reliable at 50Mhz. You get
communication errors like
barebox@Phytec phyBOARD SUBRA:/ ls /mnt/mmc/
mmc2: detected SD card version 2.0
mmc2: registered mmc2
imx-esdhc 2198000.usdhc: timeout 2
mmc2: Cannot read MBR/partition table
Therefore reduce the maximum clock speed to avoid these problems.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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add atmel,24c32 mounted on module
Signed-off-by: Jan Remmet <j.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for phyBOARD-SUBRA-i.MX6 with phyFLEX-i.MX6 Quad 1GiB on one
bank. This patch factors out the common device tree nodes for the Quad
and Solo variant into 'imx6qdl-phytec-phyboard-subra.dtsi'.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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After doing a 'saveenv' command, it is no longer possible to boot.
The reason for this behaviour is that the 'barebox' partition has
currently
a size of 0x80000 (512 kB), which is not sufficient to store the barebox
binary. This causes the 'barebox' and 'barebox-environment' partitions
to overlap.
Fix this problem by increasing the size of the 'barebox' partition and
by placing the 'barebox-environment' right after it.
This patch increases the barebox partition for all i.MX boards to
0xe0000
Reported-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Partition names shouldn't be continuously numbered, instead the part
behind the '@' should match the reg property. Fix this for all ARM
device trees.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
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This patch fixes memory detection on the Digi ccxmx53 board.
Also updates dts to support nand.
Cleaned up whitespace?
Signed-off-by: Jason Cobham <cobham.jason@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Make sure that Barebox specific .dtsi files are included after .dtsi
files imported from Linux kernel. This way those local .dtsi files can
reference phandles defined in Linux kernel files.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The power button is not part of the CPU module and can be triggered
wrongly on other baseboards. Disable it since we do not need it
currently.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The device tree for the 801x variant only contains displays. The
displays are not part of the SoM, but instead of the baseboard,
so they should be described in a baseboard dts. With this patch
we rather include the common tx6x dtsi file and drop 801x from
the barebox device tree names.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The i.MX6q variant is basically the same as the i.MX6dl variant, just
with another SoC and the usual i.MX6q/i.MX6dl adjustments.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The TX6 board come with either NAND flash or eMMC as primary
storage medium. This adds support for the eMMC variants.
We can detect if we have NAND or eMMC by looking at the
bootsource which will be configured accordingly. This
way we can modify the device tree during runtime and do
not have to create a new image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The stuff we currently have in the i.MX6q dts file can be reused for
the i.MX6dl variants, so factor out a common dtsi file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Upstream has dropped those from the base dtsi, as long as we can't
fully switch to the upstream board DT add the correct alias to the
barebox copy.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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v7: eof whitespace fixes
A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign
Signed-off-by: Tim Sander <tim@krieglstein.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Reduce even more size of beaglebone MLO device tree with stripping
the clocks.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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use eeprom as name like in the kernel. This is needed if you use the
state framework.
phycard: also fix index, it has address 0x54
Signed-off-by: Jan Remmet <j.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since 253fb33 (input: gpio-keys: convert to input framework) the
gpio-buttons are registered with the input framework which has the
side effect that they are activated during boot and no longer have
to be activated manually by activating the input device console.
This reveals that the gpio-button polarities are wrong: The autoboot
is no longer running through since a gpio button press is wrongly
detected.
Fix the polarities in the barebox dts for now to get back a working
board. A proper fix has been sent upstream to the kernel. Once this
has landed and propagated back to barebox this patch can be reverted.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The dts files accidently have been added to dts/. Move them to a proper
place.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Currently only second stage booting from the vendor U-Boot is tested. I
don't want to flash barebox into NAND yet because UART-booting for
recovery doesn't work for me.
Working so far are:
- UART
- networking
- nand flash
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Setting a fixed memory size prevents from using the different board
variants with different memories equipped.
barebox is able to read RAM size informations from the imx53 RAM
controller and thus does not require this information passed via dts.
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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socfpga would load the environment from a file named "barebox.env"
located on the device "/dev/mmc0.1". Both those names are hard-coded
in the socfpga code and can't be changed.
Barebox supports selecting the location of the environment using a
"barebox,environment" node in device tree's "chosen" node. And
recently supports specifying that the env should come from a file on
this device.
Change socfpga to use this mechanism by adding the appropriate device
node.
Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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*.dtb.lzo are generated during compilatiion, delete them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Also move the initcall to the level matching the name of the
function.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add Phytec phyCORE-i.MX6 SOM.
- imx6dl-phytec-phycore-som-nand
- 256GB RAM on 1 Bank with 32Bit
- 10/100MBit Ethernet
- NAND
- SD
- UART
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add Phytec phyCORE-i.MX6 SOM.
Support:
- imx6q-phytec-phycore-som-nand:
- 1GB RAM on 1 Bank with 64Bit
- 1GBit Ethernet
- SPI NOR
- NAND
- SD
- UART
- imx6q-phytec-phycore-som-emmc
- 1GB RAM on 1 Bank with 64Bit
- 1GBit Ethernet
- SPI NOR
- eMMC
- SD
- UART
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The main idea behind this patch is to avoid redundant code. Because of
the module similarities of all i.MX6 based phytec boards, we can merge
its code.
The phytec-som-imx6 merges the code of all i.MX6 based phytec SOMs. So
we will have only one "board" in the barebox for phyCARD-i.MX6 and
phyFLEX-i.MX6.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use numeric suffix for 'environment-sd3' in device tree. This patch
prepares phytec-phycard-imx6 for the SOM unification.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The production models have the MAC fuses blown, so we can use a
real MAC address instead of a random one.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Now that we have a full set of DRAM configuration entries we can
build images for the full set of modules on Hummingboard.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Removed duplicate ldb node. Removed disabled nodes
Signed-off-by: Anton Bondarenko <anton.bondarenko.sama@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support support for the i.MX6 Technexion Wandboard. The
board comes in different SoC variants and different amounts of RAM.
The baord type is autodetected based on the SoC type, so all boards
can be supported by the same binary image.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Otherwise boards cannot include board files from the kernel dts
without getting the file ordering wrong.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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There are phyFLEX modules with only the first eth phy mounted.
As barebox only supports the first interface anyway, disable
the second interface for now.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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