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* arm: cpu: add basic arm64 mmu supportRaphael Poggi2016-07-061-3/+11
| | | | | | | | | | | | | | | | This commit adds basic mmu support, ie: - DMA cache handling is not supported - Remapping memory region also The current mmu setting is: - 4KB granularity - 3 level lookup (skipping L0) - 33 bits per VA This is based on coreboot and u-boot mmu configuration. Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* rework remap_rangeSascha Hauer2015-11-031-19/+4
| | | | | | | | | | | | | | | | | | remap_range is for remapping regions with different cache attributes. It is implemented for ARM and PowerPC only, the other architectures only provide stubs. Currently the new cache attributes are passed in an architecture specific way and the attributes have to be retrieved by calls to mmu_get_pte_cached_flags() and mmu_get_pte_uncached_flags(). Make this simpler by providing architecture independent flags which can be directly passed to remap_range() Also provide a MAP_ARCH_DEFAULT flag and a arch_can_remap() function. The MAP_ARCH_DEFAULT defaults to whatever caching type the architecture has as default. the arch_can_remap() function returns true if the architecture can change the cache attributes, false otherwise. This allows the memtest code to better find out what it has to do. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: l2x0: Flush cache before disabling itSascha Hauer2015-08-081-0/+1
| | | | | | Otherwise entries may still be in the cache and never reach memory. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: MMU: unexport cache maintenance functionsLucas Stach2015-03-061-14/+0
| | | | | | | | Those should only be used internally. All users should rather use the streaming DMA API, which does proper cache maintenance. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: move DMA alloc functions to dma.hLucas Stach2015-03-061-26/+0
| | | | | | | | | | This better separates the DMA from the MMU functionality. Also move all drivers that only depends on asm/mmu.h for the alloc functions over to the common header. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: move virt<->phys translation to io.hLucas Stach2015-03-061-12/+0
| | | | | | | | | | | That's the place where Linux has them and other architectures would implement this. This will help in phasing out the direct usage of the ARM asm/mmu.h header. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: change dma_alloc/free_coherent to match other architecturesLucas Stach2015-03-061-5/+12
| | | | | | | | | As a lot drivers currently rely on the 1:1 virt->phys mapping on ARM we define DMA_ADDRESS_BROKEN to mark them. In order to use them on other architectures with a different mapping they need proper fixing. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: virt_to_phys should take a volatile ptrLucas Stach2015-02-251-2/+2
| | | | | | | | So users can pass in device memory pointers without provoking warnings. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARN: fixup vector addresses for relocatable binariesSascha Hauer2013-03-071-1/+0
| | | | | | | With relocatable binaries the vector addresses cannot be supplied by the linker. This adds support for fixing them up during runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* remap_range: make function 'remap_range' globalAlexander Aring2013-01-181-0/+17
| | | | | | | | | | | | Change function remap_range in arm architecture to make it global accessable. For example command 'memtest' can change pte flags to enable or disable cache. Add dummy function for others architectures that doesn't have mmu or pte support. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM mmu: add dma_allocMarc Kleine-Budde2012-06-301-2/+11
| | | | | | | | | dma_alloc() allocates memory aligned to cache lines. We have to use cache line aligned buffers if a driver calls dma_inv_range on the buffer. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arch/arm: mmu: add map_io_range()Robert Jarzmik2011-12-211-0/+6
| | | | | | | | | Add a function to remap an IO range into a virtual addresses range. This is particulary usefull for the few devices mapped at physical address 0, as the MTD boot devices. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM boards: remove now unnecessary mmu callsSascha Hauer2011-08-031-7/+0
| | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ARM: rework MMU supportSascha Hauer2011-08-031-5/+15
| | | | | | | | | | | | | | | | | | In barebox we used 1MiB sections to map our SDRAM cachable. This has the drawback that we have to map our sdram twice: cached for normal sdram and uncached for DMA operations. As address space gets sparse on newer systems we are sometines unable to find a suitably big enough area for the dma coherent space. This patch changes the MMU code to use second level page tables. With it we can implement dma_alloc_coherent as normal malloc, we just have to remap the allocated area uncached afterwards and map it cached again after free(). This makes arm_create_section(), setup_dma_coherent() and mmu_enable() noops. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: pass size to dma_free_coherentSascha Hauer2011-08-011-2/+7
| | | | | | We'll need it later once we remap dma memory. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM l2x0: make init function static inline if l2 is not availableSascha Hauer2011-08-011-0/+6
| | | | | | So that the ifdeffery can be moved out of the board code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM dma_alloc_coherent: Fix alignment for !MMU caseSascha Hauer2011-07-281-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Fix error handling with malloc, memalign etc. Introduce xmemalign().Krzysztof Halasa2011-01-071-1/+1
| | | | | | | | | | | | | | The idea is to panic() when there is no memory available for normal operation. Exception: code which can consume arbitrary amount of RAM (example: files allocated in ramfs) must report error instead of panic(). This patch also fixes code which didn't check for NULL from malloc() etc. Usage: malloc(), memalign() return NULL when out of RAM. xmalloc(), xmemalign() always return non-NULL or panic(). Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* add l2x0 cache supportSascha Hauer2010-03-301-0/+11
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add a wrapper around dma_* functionsSascha Hauer2010-03-301-0/+4
| | | | | | This is a preparation to add second level cache support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pass arguments to dma_* as unsigned long as the kernel doesSascha Hauer2010-03-301-6/+6
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] move include/asm-arm to arch/arm/include/asmJean-Christophe PLAGNIOL-VILLARD2009-10-221-0/+64
Move platform independent header files to arch/arm/include/asm, leaving those in asm/arch* and asm/proc* alone. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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