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* arm: include relevant headers in barebox-armLucas Stach2014-12-171-0/+2
| | | | | | | Provide the necessary types and defines used in this header. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: implement recommended WAR for errata 709718Lucas Stach2014-11-071-0/+12
| | | | | | | | | | | | | ARM Cortex A8 errata 709718: "Load and store operations to shared device memory regions may not complete in program order" We implement the recommended workaround in the bootloader as it must be applied before enabling the MMU for the first time. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: add errata workaroundsLucas Stach2014-06-261-0/+67
| | | | | | | | Header only implementation, so they can be pulled into the individual SoC cpu init functions. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: change signature of barebox_arm_entryLucas Stach2014-05-051-2/+2
| | | | | | | | | | | Mostly to make it clear that boarddata needs to be something we can dereference. As this is a pretty invasive change, use the opportunity to make the signature 64bit safe. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* common: Allow for I/O mapped I/OMichel Stam2014-04-081-0/+2
| | | | | | | | Rework the current framework so that I/O mapped I/O resources are also possible. Signed-off-by: Michel Stam <michel@reverze.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* import _AC and UL macros from linux kernelAntony Pavlov2014-03-181-0/+7
| | | | | | | | This macros are used in exported from linux TI DaVinci code. Also this macros are used in MIPS cache support code. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Make ENTRY_FUNCTION more robustSascha Hauer2013-12-101-3/+13
| | | | | | | | | | An entry function should begin with a exception header. For this to work properly the entry function should not contain any code which gcc might put before the header. To make this sure change the ENTRY_FUNCTION macro so that it generates one function which only contains the exception header and a second function which contains the original body of the entry function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: remove asm/hardware.hSascha Hauer2013-11-081-18/+0
| | | | | | | asm/hardware.h does not have any content except including mach/hardware.h. include mach/hardware.h directly where needed and get rid of asm/hardware.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: invalidate caches thoroughlySascha Hauer2013-09-211-10/+0
| | | | | | | | | | | | The data caches should be invalided once during startup. This should also be done when we do not have the MMU enabled in barebox because the Kernel does not invalidate the caches during start. To make this sure this patch enables the arm_early_mmu_cache_invalidate function even if MMU support is disabled. Additionally this patch adds calls to arm_early_mmu_cache_invalidate in start.c and uncompress.c. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/arm-gpio'Sascha Hauer2013-09-051-1/+4
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| * ARM: remove include of mach/gpio.h for gpiolib usersSascha Hauer2013-08-161-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | gpiolib user have nothing to define in their machine specific gpio.h, so do not include it. The only thing they could define would be ARCH_NR_GPIOS, but currently no architecture defines it. Should an architecure feel the need to do it this would be a good opportunity to get rid of this limitation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: Create an assembly arm_cpu_lowlevel_init functionSascha Hauer2013-08-071-63/+1
|/ | | | | | | To avoid the code duplication between the static inline C function and the assembly macro. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add multi images supportSascha Hauer2013-07-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the make infrastructure to build multiple SoC or board specific images from a single barebox binary. The basic idea is that we no longer have a single pbl, but instead multiple pbls, one per image if necessary. Each pbl is defined by its entry function so that each pbl can do exactly what a given board needs. Additionally the pbls together with a self extracting barebox binary can be encapsulated in specific image formats. squashed in build fixes from Lucas Stach for make version >= 3.82: Split Multimage Makefile rule in explicit and implicit parts Fixes build with make version >=3.82 Frome the make 3.82 NEWS file: * WARNING: Backward-incompatibility! In previous versions of make it was acceptable to list one or more explicit targets followed by one or more pattern targets in the same rule and it worked "as expected". However, this was not documented as acceptable and if you listed any explicit targets AFTER the pattern targets, the entire rule would be mis-parsed. This release removes this ability completely: make will generate an error message if you mix explicit and pattern targets in the same rule. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Lucas Stach <dev@lynxeye.de>
* ARM: split barebox_arm_head in two separate functionsSascha Hauer2013-06-261-3/+11
| | | | | | | | | | | | This adds a new function __barebox_arm_head() which defines an the regular barebox ARM header, but which jumps to the end of the function so that this can be embedded into another function. barebox_arm_head() now just uses it and jumps to barebox_arm_reset_vector just like it did before. This makes it possible to define board specific entry points. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Allow to pass a devicetree via boarddataSascha Hauer2013-06-261-0/+2
| | | | | | | Addionally to having a builtin DTB provide the possibility for the board to provide a dtb via boarddata. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: invalidate data caches during early initSascha Hauer2013-05-231-0/+5
| | | | | | | | | | Some SoCs come up with invalid entries in the data cache. This can lead to memory corruption when we enable them later, so invalidate the caches early. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Lucas Stach <l.stach@pengutronix.de>
* arm: properly init alignment trap bitLucas Stach2013-05-231-1/+1
| | | | | | | | | On ARMv7 the intention is to disable the alignment trap to be able to use hardware assisted unaligned load/stores. Fix the init to do the right thing. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/relocate'Sascha Hauer2013-04-045-1/+118
|\ | | | | | | | | Conflicts: arch/arm/lib/barebox.lds.S
| * ARM: Add relocatable binary supportSascha Hauer2013-03-071-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For making the same binary executable on different SoCs which have different DRAM addresses we have to be independent of the compile time link address. This patch adds relocatable binary support for the ARM architecture. With this two new functions are available. relocate_to_current_adr will fixup the binary to continue executing from the current position. relocate_to_adr will copy the binary to a given address, fixup the binary and continue executing from there. For the PBL and the real image relocatable support can be enabled independently. This is done to (hopefully) better cope with setups where the PBL runs from SRAM or ROM and the real binary does not. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARN: fixup vector addresses for relocatable binariesSascha Hauer2013-03-072-1/+8
| | | | | | | | | | | | | | With relocatable binaries the vector addresses cannot be supplied by the linker. This adds support for fixing them up during runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: provide accessor functions for linker variablesSascha Hauer2013-03-071-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With relocatable binaries the linker is not able to supply absolute addresses. These only get available when the relocation function is being run. Since for early initialization we need some variables before relocation, we supply them relatively to some known address in the binary. This means that the variables have to be converted to absolute addresses during runtime. This patch adds a C macro and an assembly macro to calculate the variables during runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: add early mmu cache flush function and use it in setup_cSascha Hauer2013-03-041-0/+8
| | | | | | | | | | | | | | | | Since recently with MMU_EARLY support it may happen that setup_c runs with data caches enabled, so we have to make sure the caches are flushed before we jump to the new binary. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: make cpu architecture detection available as static inline functionSascha Hauer2013-03-041-0/+43
| | | | | | | | | | | | | | | | | | When we have multi cpu support compiled in we need the cpu architecture early so that we can pick the correct cacheflush function. Make it available as static inline function and add a comment above it that this function normally should not be used. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc-arm'Sascha Hauer2013-04-041-0/+1
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| * | ARM: Add missing barebox_arm_boarddata functionSascha Hauer2013-03-101-0/+1
| |/ | | | | | | | | | | | | | | The comment above barebox_arm_entry promises to preserve the boarddata variable passed to it which can then later get back with barebox_arm_boarddata(). This function was missing so far, add it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2013-04-041-17/+0
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| * | clk: remove unused __clk_[get|put]Sascha Hauer2013-04-031-17/+0
| |/ | | | | | | | | | | | | This is some unused code resulting from copying stuff from the kernel. Remove it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx-external-nand-boot'Sascha Hauer2013-04-041-0/+10
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| * | ARM: head: Add some space behind the image headerSascha Hauer2013-03-121-0/+10
| |/ | | | | | | | | | | | | | | This adds 32bytes of space behind the image header (exception table + barebox magic) for board/SoC specific use. This can be used for example to embed some extra information in a flashed image. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / ARM: Add CPU detection macros for ARM720Alexander Shiyan2013-03-151-0/+5
|/ | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/vexpress'Sascha Hauer2013-03-043-0/+136
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| * arm: add vexpress board supportJean-Christophe PLAGNIOL-VILLARD2013-02-122-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | detect the cpu model to dynamise the periphs mapping currently only tested on qemu but should work on real hardware Cortex-A9 if you use 1GiB of ram you can run the same barebox on Cortex-A15 or Cortex-A9 otherwise use vexpress_ca9_defconfig where the TEXT_BASE is at 0x63f00000 when we will add the relocation support this defconfig will be drop qemu/arm-softmmu/qemu-system-arm -M vexpress-a9 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic Cortex-A15 qemu/arm-softmmu/qemu-system-arm -M vexpress-a15 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: add macro cpu_is_xxxJean-Christophe PLAGNIOL-VILLARD2013-02-111-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | so we can detect ARM920 ARM926 ARM1176 PXA250 PXA255 PXA270 Cortex-A8 Cortex-A5 Cortex-A7 Cortex-A9 Cortex-A15 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arm: cache-l2x0 update sync define with Linux 3.5Jean-Christophe PLAGNIOL-VILLARD2013-02-111-28/+80
|/ | | | | | | Drop copy in cache-l2x0 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: rename reset and common_reset to barebox_arm_reset_vector and ↵Jean-Christophe PLAGNIOL-VILLARD2013-02-081-4/+4
| | | | | | | | | arm_cpu_lowlevel_init reset is confusing with the cpu reset and impossible to grep Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Setup stack at end of SDRAMSascha Hauer2013-02-041-0/+2
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM start: pickup parameters from pblSascha Hauer2013-02-041-1/+0
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add __noreturn to board_init_lowlevel_returnSascha Hauer2013-02-041-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add new entry point for bareboxSascha Hauer2013-02-041-0/+1
| | | | | | | | | | Memory is a precious resource, so it makes sense to make it available as early as possible. By definition the lowlevel init code already knows where to find memory because it's the lowlevel init code which sets up the memory. Until all boards are converted this new entry is just a fallback to the old entry point. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/omap'Sascha Hauer2013-02-041-0/+9
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| * feature_list: a way to pass hardware info to the kernelVicente Bergas2013-01-211-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hi Sascha, I've made the changes you suggested in this resent patch. Everything related to custom ATAGs has been moved to the board directory. The generic code does not make any references to feature lists or bootloader versions. About the setup_feature_list prototype: it has been renamed to atag_appender it's not a function, it's a pointer to a function. Can it have a prototype other than it's own declaration? All non-related changes has been dropped. They were checkpatch.pl warnings unrelated to this patch. Regards, Vicente. Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | remap_range: make function 'remap_range' globalAlexander Aring2013-01-181-0/+17
|/ | | | | | | | | | | | Change function remap_range in arm architecture to make it global accessable. For example command 'memtest' can change pte flags to enable or disable cache. Add dummy function for others architectures that doesn't have mmu or pte support. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM startup: Ensure CR_A flag is cleared on architectures >= ARMv6Sascha Hauer2012-12-081-0/+2
| | | | | | | We allow unaligned accesses on ARMv6 onwards, make sure the CR_A flag is cleared so that unaligned accesses do not trap. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/arm-start' into for-next/armSascha Hauer2012-10-171-0/+2
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| * ARM: add assembly function for setting up C environmentSascha Hauer2012-10-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | Sometimes Assembler beats C. In this case a small assembler function called without parameters can: - copy a binary to its link address - clear the bss - return to the same position in the copied binary Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: add rename PSR bits to match linux namesVicente Bergas2012-10-151-25/+31
| | | | | | | | | | Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: introduce arm_setup_stack function and use itSascha Hauer2012-10-131-0/+5
| | | | | | | | | | | | | | We have enough places which setup0 a stack to justify a static inline function for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: Support multiple ARM architecturesSascha Hauer2012-10-131-0/+2
| | | | | | | | | | | | | | The different ARM architectures need different cache functions. This patch makes them selectable during runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: Add cpu_architecture() functionSascha Hauer2012-10-102-0/+160
|/ | | | | | | Once we run on multiple SoCs we must know which arm architecture we are on. Add cpu_architecture() from the kernel to detect it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/arm-board-reset'Sascha Hauer2012-10-032-0/+72
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/start-reset.c arch/arm/include/asm/barebox-arm.h arch/arm/mach-omap/Kconfig arch/arm/mach-omap/omap3_core.S
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