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* ARM: correctly identify ARMv6 K/ZLucas Stach2017-03-031-0/+8
| | | | | | | | | | The ARMv6 K/Z derivatives have a v7 compatible MMU, but all other parts (including the cache handling) is still at v6. As we don't make use of the more advanced features of the v7 MMU in Barebox, it's okay to just override this to properly identify the CPU as ARMv6. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx'Sascha Hauer2017-02-137-1/+403
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| * ARM: Add PSCI supportSascha Hauer2017-02-135-1/+293
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains the barebox implementation for the ARM "Power State Coordination Interface" (PSCI). The interface is aimed at the generalization of code in the following power management scenarios: * Core idle management. * Dynamic addition and removal of cores, and secondary core boot. * big.LITTLE migration. * System shutdown and reset. In practice, all that's currently implemented is a way to enable the secondary core one some SoCs. With PSCI the Kernel is either started in nonsecure or in Hypervisor mode and PSCI is used to apply power to the secondary cores. The start mode is passed in the global.bootm.secure_state variable. This enum can contain "secure" (Kernel is started in secure mode, means no PSCI), "nonsecure" (Kernel is started in nonsecure mode, PSCI available) or "hyp" (Kernel is started in hyp mode, meaning it can support virtualization). We currently only support putting the secure monitor code into SDRAM, which means we always steal some amount of memory from the Kernel. To keep things simple for now we simply keep the whole barebox binary in memory The PSCI support has been tested on i.MX7 only so far. The only supported operations are CPU_ON and CPU_OFF. The PSCI and secure monitor code is based on the corresponding U-Boot code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: Add smc call supportSascha Hauer2017-02-081-0/+104
| | | | | | | | | | | | Taken from the Kernel: A wrapper to make a smc call from C. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: Add UNWIND macroSascha Hauer2017-02-081-0/+6
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: start: Fix image size calculationSascha Hauer2017-02-081-0/+2
|/ | | | | | | | | | In barebox_non_pbl_start() we do not run at the address we are linked at, so we must read linker variables using ld_var(). Since ld_var() current is not available on arm64 we create two zero sized arrays, one at the begin of the image and one at the end. The difference between both is the image size we are looking for. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Fix a bug in stack's "top" initializationAndrey Smirnov2017-01-091-1/+7
| | | | | | | | | | | | | | | | | | | Code-paths responsible for initializing CPU's stack pointer and variable used in stack memory resource reservation got out of sync which resulted in actual stack being 64K off from what "stack" struct resource registered by arm_request_stack() thought it was. At least one issue resulting from that can be easily triggered by running: memtest -t This commit unifies the aforementioned code to a certain degree which solves the problem and hopefuly makes it less likely to become an issue again. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/arm'Sascha Hauer2016-10-101-1/+8
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| * ARM: Fix calling of arm_mem_barebox_image()Sascha Hauer2016-09-151-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm_mem_barebox_image() is used to pick a suitable place where to put the final image to. This is called from both the PBL uncompression code and also from the final image. To make it work properly it is crucial that it's called with the same arguments both times. Currently it is called with the wrong image size from the PBL uncompression code. The size passed to arm_mem_barebox_image() has to be the size of the whole uncompressed image including the BSS segment size. The PBL code calls it with the compressed image size instead and without the BSS segment. This patch fixes this by reading the uncompressed image size from the compressed binary (the uncompressed size is appended to the end of the compressed binary by our compression wrappers). The size of the BSS segment is unknown though by the PBL uncompression code, so we introduce a maximum BSS size which is used instead. The code before this patch worked by accident because the base address of the final image was aligned down to a 1MiB boundary. The alignment was sufficient already to make enough space. This breaks though when the uncompressed image including BSS becomes bigger than 1MiB while the compressed image is smaller. Fixes: 65071bd0: arm: Clarify memory layout calculation Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arm(64): don't advertise stack_dumping capabilities for ARM64Lucas Stach2016-10-041-0/+2
|/ | | | | | | The unwind code to support this feature is not there yet. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: include: swab: use rigth assembly for armv8Raphael Poggi2016-07-061-0/+4
| | | | | Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: cpu: add basic arm64 mmu supportRaphael Poggi2016-07-062-3/+151
| | | | | | | | | | | | | | | | This commit adds basic mmu support, ie: - DMA cache handling is not supported - Remapping memory region also The current mmu setting is: - 4KB granularity - 3 level lookup (skipping L0) - 33 bits per VA This is based on coreboot and u-boot mmu configuration. Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: include: system_info: add armv8 identificationRaphael Poggi2016-07-061-0/+38
| | | | | Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: include: bitops: arm64 use generic __flsRaphael Poggi2016-07-061-0/+5
| | | | | Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: include: system: add arm64 helper functionsRaphael Poggi2016-07-061-1/+45
| | | | | Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: cpu: add arm64 specific codeRaphael Poggi2016-07-061-0/+9
| | | | | | | | | | This patch adds arm64 specific codes, which are: - exception support - cache support - rework Makefile to support arm64 Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: start: Fix arm_mem_barebox_image for !CONFIG_RELOCATABLESascha Hauer2016-06-201-2/+6
| | | | | | | | | | | | | | Fixes: 65071bd arm: Clarify memory layout calculation arm_mem_barebox_image() shall return the beginning of the barebox image (and thus the end of the malloc region). For relocatable images we can return a suitable location, but for non relocatable images we do not have a choice: We must return TEXT_BASE. If TEXT_BASE happens to be outside the memory region between membase and endmem we can return the base of the ramoops area. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: Markus Pargmann <mpa@pengutronix.de>
* whole tree: remove trailing whitespacesDu Huanpeng2016-04-211-2/+2
| | | | | Signed-off-by: Du Huanpeng <u74147@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/ubifs'Sascha Hauer2016-04-082-0/+335
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| * ARM: Add atomic.h from u-boot v2016.03Alexander Stein2016-04-082-0/+335
| | | | | | | | | | | | | | | | atomic-long.h: * Replace __UBOOT__ with __BAREBOX__ Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2016-04-082-0/+17
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| * | L2x0: i.MX6: Replace magic numbers with constantsAndrey Smirnov2016-03-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Use constants instead of magic numbers for PL301 registers bits in imx6_mmu_init() Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: Add errata 845369 workaroundAndrey Smirnov2016-03-171-0/+9
| |/ | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / ARM: Do not use last 64KiB of address space for bareboxSascha Hauer2016-04-011-1/+1
|/ | | | | | | | The last 64KiB of address space may be used for the vector table at 0xffff0000, so we cannot use it for barebox. The easiest way to archieve this is to never use the last 64KiB of memory. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/pstore'Sascha Hauer2016-01-111-18/+49
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| * arm: Add RAMOOPS memory areaMarkus Pargmann2015-12-101-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | RAMOOPS is a driver that uses a reserved static memory region to store the data from the last panic or boot. This helps to debug crashes at the next boot while preserving the boot messages. To guarantee a memory area that is not altered by barebox or the kernel, this area is located at the end of the RAM right after barebox and before the STACK. This ensures that changing barebox sizes do not interfere with RAMOOPS. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: Clarify memory layout calculationMarkus Pargmann2015-12-101-18/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory calculations used are all hardcoded into three different files, start-pbl.c, uncompress.c and start.c. To make this more readable and reliable, this patch gathers these information in barebox-arm.h with static inline functions for the calculation of the memory offsets. This patch also adds proper handling of different barebox/board data sizes. Currently only 1MB+Alignment of RAM is reserved for Barebox and board data. This could be too small for bigger devicetrees and barebox. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: asm: Add convenience fucntions to access VBARAndrey Smirnov2016-01-111-0/+20
|/ | | | | | | Add two functions to get/set VBAR register. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/memtest'Sascha Hauer2015-11-061-19/+4
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| * rework remap_rangeSascha Hauer2015-11-031-19/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remap_range is for remapping regions with different cache attributes. It is implemented for ARM and PowerPC only, the other architectures only provide stubs. Currently the new cache attributes are passed in an architecture specific way and the attributes have to be retrieved by calls to mmu_get_pte_cached_flags() and mmu_get_pte_uncached_flags(). Make this simpler by providing architecture independent flags which can be directly passed to remap_range() Also provide a MAP_ARCH_DEFAULT flag and a arch_can_remap() function. The MAP_ARCH_DEFAULT defaults to whatever caching type the architecture has as default. the arch_can_remap() function returns true if the architecture can change the cache attributes, false otherwise. This allows the memtest code to better find out what it has to do. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2015-11-061-0/+9
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| * | ARM: Allow compressed dtb binariesSascha Hauer2015-10-271-0/+9
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current multi image build process the DTBs end up uncompressed in the PBL. This can be annoying because the PBL is often very size constrained. This patch allows to put the DTBs in as lzo compressed binary into the PBL. Since lzo offers quite good compression ratios for DTBs no other compression algorithm has been implemented for now. Boards which want to use the compressed DTBs only have to change the __dtb_ prefix in the DTB name to __dtb_z_. Also they should select ARM_USE_COMPRESSED_DTB to make sure barebox supports uncompressing the DTB. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / ARM: Add support for semihostingAndrey Smirnov2015-10-301-0/+19
|/ | | | | | | | | | Add semihosting API implementation and implement a filesystem driver to access debugging host filesystem using it. Tested on Freescale SabreSD board (i.MX6Q) using OpenOCD Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add implementation for dma_alloc_writecombine for !CONFIG_MMULucas Stach2015-09-141-0/+5
| | | | | | | | This fixes build failures in builds without MMU support by providing a fallback implementation. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/gpio'Sascha Hauer2015-09-011-10/+0
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| * gpio: Drop asm-generic/gpio.hSascha Hauer2015-08-201-10/+0
| | | | | | | | | | | | | | | | | | | | Since we no longer have custom gpio function prototypes we can drop the prototypes from asm-generic/gpio.h can add them to include/gpio.h instead. While at it add static inline dummy wrappers for !CONFIG_GENERIC_GPIO so that code using gpios can compile without gpio support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: l2x0: Flush cache before disabling itSascha Hauer2015-08-081-0/+1
|/ | | | | | Otherwise entries may still be in the cache and never reach memory. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* exitcall: move arch_shutdown to exitcall infrastructureHerve Codina2015-07-131-2/+0
| | | | | Signed-off-by: Herve Codina <Herve.CODINA@celad.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add a machine number mechanism for boarddataSascha Hauer2015-07-021-1/+26
| | | | | | | | | | | | | | | Multi machine barebox builds have to pass information on which board we are running on via boarddata. Usually this will be a pointer to a device tree. Some boards might not have a device tree available though because they are either not ported over to device tree yet, or are running in some limited first state environment which does not offer enough space for a device tree. For these cases this patch adds a mechanism to embed a machine number into a struct type along with a magic number. This makes it possible to check for a specific machine later during regular runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: use generic posix_types.hSascha Hauer2015-06-031-78/+1
| | | | | | | Use generic asm-generic/posix_types.h instead of repeating the typedefs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* introduce bitsperlong.h for remaining architecturesSascha Hauer2015-06-032-1/+2
| | | | | | | | This introduces the bitsperlong.h file for the remaining architectures. It's purpose is to define BITS_PER_LONG which in the next step can be used by a generic posix_types.h file. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* dma: Use generic place for dma_addr_t typedefSascha Hauer2015-05-221-5/+0
| | | | | | | | | Instead of letting all architectures define their own dma_addr_t use a common place in include/linux/types.h and use a Kconfig symbol that architectures can select to define the width of dma_addr_t. The same is done in the Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/streaming-dma'Sascha Hauer2015-03-093-46/+49
|\ | | | | | | | | Conflicts: drivers/mci/dw_mmc.c
| * ARM: MMU: unexport cache maintenance functionsLucas Stach2015-03-061-14/+0
| | | | | | | | | | | | | | | | Those should only be used internally. All users should rather use the streaming DMA API, which does proper cache maintenance. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: implement streaming DMA opsLucas Stach2015-03-061-0/+10
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: move DMA alloc functions to dma.hLucas Stach2015-03-062-27/+24
| | | | | | | | | | | | | | | | | | | | This better separates the DMA from the MMU functionality. Also move all drivers that only depends on asm/mmu.h for the alloc functions over to the common header. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: move virt<->phys translation to io.hLucas Stach2015-03-062-12/+15
| | | | | | | | | | | | | | | | | | | | | | That's the place where Linux has them and other architectures would implement this. This will help in phasing out the direct usage of the ARM asm/mmu.h header. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: change dma_alloc/free_coherent to match other architecturesLucas Stach2015-03-061-5/+12
| | | | | | | | | | | | | | | | | | As a lot drivers currently rely on the 1:1 virt->phys mapping on ARM we define DMA_ADDRESS_BROKEN to mark them. In order to use them on other architectures with a different mapping they need proper fixing. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2015-03-091-0/+4
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| * ARM: Allow to mask data abortsSascha Hauer2015-02-271-0/+4
| | | | | | | | | | | | | | | | | | | | Sometimes it's useful to test if a memory operation works or aborts. This adds data_abort_mask() to ignore data aborts and data_abort_unmask() to enable them again. This is used in the next step for the 'md' command so that illegal addresses just show 'xxxxxxxx' instead of crashing the system. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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