summaryrefslogtreecommitdiffstats
path: root/arch/arm/include
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-next/at91'Sascha Hauer2024-03-151-6/+14
|\
| * ARM: replace ENTRY_FUNCTION_HEAD with ENTRY_FUNCTION_WITHSTACK_HEADAhmad Fatoum2024-02-231-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow SoC-specific entry functions that don't replicate the code in ENTRY_FUNCTION, we provide a helper macro that support specifying a custom HEAD, but only on arm32. Make this macro private by prefixing with __ and implement the superset ENTRY_FUNCTION_WITHSTACK_HEAD for both arm32 and arm64 that should be used instead. Eventually, we will want to switch away from naked functions on arm32, like we did on arm64 and then we could use the same implementation for both platforms (and support clang on arm32!), but till then, this seems the least ugly way to go about it. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240220093100.1539120-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: add optional EFI stubAhmad Fatoum2024-03-052-1/+23
| | | | | | | | | | | | | | | | | | | | | | While very recent binutils releases have dedicated efi-*-aarch targets, we may want to support older toolchains. For this reason, we import the kernel's EFI stub PE fakery, so the same barebox-dt-2nd.img may be loaded as if it were a "normal" or an EFI-stubbed kernel. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240304190038.3486881-87-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: make board data definitions accessible to other architecturesAhmad Fatoum2024-03-051-23/+7
|/ | | | | | | | | | | struct barebox_arm_boarddata is a way for PBL to handover a machine number instead of a FDT. We will reuse this mechanism to hand over EFI image handle and system table in a later commit, so prepare for that by moving it to a central location and adjust the naming. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240304190038.3486881-64-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/layerscape'Sascha Hauer2024-01-232-0/+42
|\
| * ARM: psci: make header self containedSascha Hauer2024-01-101-0/+2
| | | | | | | | | | | | | | | | arch/arm/include/asm/psci.h uses struct device_node, so declare it in order to make the file self contained. Link: https://lore.barebox.org/20240109161527.3237581-13-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: atf: add bl31 v2 calling methodSascha Hauer2024-01-081-0/+40
| | | | | | | | | | | | | | | | | | Newer bl31 binaries require a slightly different parameter structure. This patch adds support for it. The code is taken from U-Boot and changed to static initializers for improved readability. Link: https://lore.barebox.org/20240104141746.165014-17-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mach-types: don't generate header at buildtimeAhmad Fatoum2024-01-041-0/+868
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have removed 4642 machine types unused by barebox, we are just left with 65 boards. Let's just include the generated header in the source tree and stop generating the header anew at build time. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231212120949.3459707-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: fix dmb on ARMv8Sascha Hauer2024-01-021-5/+1
|/ | | | | | | | | Add "sy" argument to the dmb instruction. This is optional for ARMv7, but mandatory for ARMv8. On ARMv7 "dsb" and "dsb sy" are equivalent, so use "dsb sy" on both ARMv7 and ARMv8 and drop the unnecessary #ifdef Link: https://lore.barebox.org/20231219130703.6522-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM64: mmu: fix mmu_early_enable VA->PA mappingLior Weintraub2023-12-181-0/+1
| | | | | | | | | | | | Fix the mmu_early_enable function to correctly map 40bits of virtual address into physical address with a 1:1 mapping. It uses the init_range function to sets 2 table entries on TTB level0 and then fill level1 with the correct 1:1 mapping. Signed-off-by: Lior Weintraub <liorw@pliops.com> Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de> # Qemu ARM64 Virt Link: https://lore.barebox.org/PR3P195MB0555FF28C5158FF2A789DC2AC390A@PR3P195MB0555.EURP195.PROD.OUTLOOK.COM Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: dma: define DMA_ALIGNMENT instead of defining dma_allocAhmad Fatoum2023-12-051-5/+1
| | | | | | | | | | There's a suitable fallback dma_alloc implementation already in dma.h, which we can use as soon as we define DMA_ALIGNMENT. Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231129061030.1780596-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/prepare-optee'Sascha Hauer2023-11-271-0/+60
|\
| * include: import Linux word-at-a-time.hAhmad Fatoum2023-11-231-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux <linux/word-at-a-time.h> interface is used to optimize searching for bytes in strings by doing word-size comparisons. This will be used in the implementation of strscpy in a follow-up commit, so import the generic version here. A good overview on the interface is available at LWN[1]. Note that it discuss Linux v3.5. The asm-generic version imported here works also on little-endian and not only big-endian[2]. [1]: https://lwn.net/Articles/501492/ [2]: Linux kernel commit a6e2f029ae34 ("Make asm/word-at-a-time.h available on all architectures"). Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231122172951.376531-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: Add support for debug_ll on TI AM62x SoCsSascha Hauer2023-11-031-0/+2
|/ | | | | | | | TI K3 SoCs have ns16550 compatible UARTs. Add lowlevel debugging support for the AM62x SoC from the K3 family. Link: https://lore.barebox.org/20230803105003.4088205-5-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2023-09-251-0/+5
|\
| * ARM: add support for booting ELF executablesAhmad Fatoum2023-09-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike MIPS and kvx, where ELF is used as kernel image format, Linux ARM support defines its own flattened format. Other kernels may be distributed as ELF images though, so it makes sense to enable booting of ELF images on ARM as well. This has been tested booting FreeRTOS ELF executables on the ZynqMP. Note that this will refuse to boot kernel ELF images as those have type dyn, while the common ELF code in barebox will only boot type exec. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230913125715.2142524-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mmu: catch stack overflowing into TTB with stack guard pageAhmad Fatoum2023-09-211-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While barebox stack is often quite generous, due to its default of 32K, bugs can make it overflow and on ARM, this clobbers the page tables leading to even harder to debug problems than usual. Let's add a 4K buffer zone between the page tables and the stack and configure the MMU to trap all accesses into it. Note that hitting the stack guard page can be silent if the exception handler places it's frame there. Still a hanging barebox may be better than an erratically behaving one. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230911150900.3584523-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mark early C setup functions as __prerelocAhmad Fatoum2023-09-211-1/+1
|/ | | | | | | | | | | | | In preparation for adding stack protector support, we need to start marking functions run before the C environment is completely set up. Introduce a __prereloc attribute for this use case and an even stronger no noinstr (no instrumentation) attribute and start adding it at enough places for bareboxproper to start up with -fstack-protector-all. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230911150900.3584523-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2023-06-223-8/+1
|\
| * include: const: make UL/ULL() macros commonly availableDenis Orlov2023-06-092-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Import the definitions from Linux. Some code actually used those already, defining them locally. As these are not needed now that there are common ones available, remove the duplicate definitions. While at it, also update _BITUL/_BITULL() definitions to align more with the latest Linux sources. Signed-off-by: Denis Orlov <denorl2009@gmail.com> Link: https://lore.barebox.org/20230609045829.2225-2-denorl2009@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM64: cpu: support 64-bit stack top in ENTRY_FUNCTION_WITHSTACKAhmad Fatoum2023-06-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | ENTRY_FUNCTION_WITHSTACK was written with the naive assumption that there will always be some memory in the first 32-bit of the address space to be used as early stack. There are SoCs out there though with sole on-chip SRAM > 4G. Accommodate this by accepting full 64-bit stack pointers in ENTRY_FUNCTION_WITHSTACK. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230531175157.1442379-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Lior Weintraub <liorw@pliops.com>
* | Merge branch 'for-next/dma-streaming-interface'Sascha Hauer2023-06-221-6/+6
|\ \
| * | dma: rework dma_sync_single_for_*() interfaceDenis Orlov2023-06-061-6/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, a lot of code handles dma_addr_t values as if they actually hold CPU addresses. However, this is not always true. For example, MIPS architecture requires an explicit conversion from the physical address space to some virtual address space segment to get a valid CPU-side pointer. Another issue is that DMA ranges that may be specified in a device tree will not work this way. To get from a virtual address to a dma handle and vice versa we need to add/subtract some offset, which is calculated from "dma-ranges" property. Only dma_map_single() was doing this, but dma_sync_single_for_*() also should. Improve the interface by adding 'struct device' as the first argument to the dma_sync_single_for_*(). This allows to do cpu_to_dma/dma_to_cpu() conversions in common code and call into arch-specific code with proper cpu-side addresses. To make things more clear, make the virtual address argument of those arch-side functions be properly represented with a void* type. Apply the required changes in device drivers that use the affected functions, making them pass the appropriate device pointer. Signed-off-by: Denis Orlov <denorl2009@gmail.com> Link: https://lore.barebox.org/20230604215002.20240-2-denorl2009@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM64: crypto: add Crypto Extensions accelerated SHA implementationAhmad Fatoum2023-05-261-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This imports the Linux v6.3 state of the ARMv8 Crypto Extensions (CE) accelerated SHA1/SHA2 routines. This increases hashing rate a tenfold: sha1-generic: digest(7 bytes) = 11750ns digest(4097 bytes) = 59125ns sha224-generic: digest(7 bytes) = 12750ns digest(4097 bytes) = 95000ns sha256-generic: digest(7 bytes) = 2250ns digest(4097 bytes) = 94875ns sha1-ce: digest(7 bytes) = 2875ns digest(4097 bytes) = 8125ns sha224-ce: digest(7 bytes) = 3125ns digest(4097 bytes) = 7750ns sha256-ce: digest(7 bytes) = 750ns digest(4097 bytes) = 7625ns This shaves 400ms of a FIT image boot that uses sha256 as digest for the images referenced by the selected configuration: barebox@imx8mn-old:/ time bootm -d kernel-a Dryrun. Aborted. time: 998ms barebox@imx8mn-new:/ time bootm -d kernel-a Dryrun. Aborted. time: 601ms Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230526063746.1155297-8-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: asm: import Linux adr_l/ldr_l assembler.h definitionsAhmad Fatoum2023-05-261-0/+211
| | | | | | | | | | | | | | | | | | These macros will come in handy to have loads in assembly routines not generate relocation entries. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230526063746.1155297-6-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: asm: implement CPU_BE/CPU_LEAhmad Fatoum2023-05-261-0/+19
|/ | | | | | | | | This will be required for incoming SHA1/2 ARMv8 Crypto Extensions assembly routines. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230526063746.1155297-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM64: mmu: implement ARMv8 mmuinfo commandAhmad Fatoum2023-05-232-0/+77
| | | | | | | | | To aid with debugging of MMU code, let's implement mmuinfo for ARMv8, like we already support for ARMv7. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230522052835.1039143-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: prepare extending mmuinfo beyond ARMv7Ahmad Fatoum2023-05-231-0/+8
| | | | | | | | | | | | | There's no reason to restrict mmuinfo to ARMv7 or ARM at all for that matter. Prepare extending it for ARMv8 support by splitting off the 32-bit parts. While at it, make the output available for debuggin by exporting a mmuinfo() function. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230522052835.1039143-8-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mmu: add physical address parameter to arch_remap_rangeAhmad Fatoum2023-05-231-1/+1
| | | | | | | | | | | | | | ARM32 has map_io_sections for non-1:1 remapping, but it's limited to 1M sections. arch_remap_range has newly gained support for 4K granularity remapping, but supports only changing attributes and no non-1:1 remapping yet. In preparation for adding this missing feature, adjust the prototype. No functional change. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230522052835.1039143-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mmu32: Use pages for early MMU setupSascha Hauer2023-05-221-0/+8
| | | | | | | | | | | | | | | | | Up to now we use 1MiB sections to setup the page tables in PBL. There are two places where this leads to problems. First is OP-TEE, we have to map the OP-TEE area with PTE_EXT_XN to prevent the instruction prefetcher from speculating into that area. With the current section mapping we have to align OPTEE_SIZE to 1MiB boundaries. The second problem comes with SRAM where the PBL might be running. This SRAM has to be mapped executable, but at the same time we should map the surrounding areas non executable which is not always possible with 1MiB mapping granularity. We now have everything in place to use two level page tables from PBL, so use arch_remap_range() for the problematic cases. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mmu: drop ttb argumentSascha Hauer2023-05-221-2/+1
| | | | | | | No need to pass ttb to the MMU code, the MMU code can itself call arm_mem_ttb() to get the desired base. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mmu: alloc 64k for early page tablesSascha Hauer2023-05-221-6/+2
| | | | | | | | | This is a preparation for using two level page tables in the PBL. To do that we need a way to allocate page tables in PBL. As malloc is not available in PBL, increase the area we use for the TTB to make some space available for page tables. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: drop cache function initializationSascha Hauer2023-05-221-2/+0
| | | | | | | | | We need a call to arm_set_cache_functions() before the cache maintenance functions can be used. Drop this call and just pick the correct functions on the first call. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
* ARM: move arm_mem_scratch_get() lower for consistencySascha Hauer2023-05-221-5/+5
| | | | | | | | | | The different arm_mem_* functions all follow the same pattern of taking the base address of the upper region minus the size of the current region and with the exception of arm_mem_scratch_get() they are all below each other. arm_mem_scratch_get() doesn't fit into this row, so move it lower. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: define stack base consistentlySascha Hauer2023-05-221-3/+6
| | | | | | | | | | The different arm_mem_* functions have the pattern that they take the region above it and substract the size of the current region. follow the pattern for getting the stack base as well. While at it move arm_mem_stack_top() lower in the file so that we have all functions following said pattern below each other. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: make arm_mem_scratch() a static inline functionSascha Hauer2023-05-221-1/+4
| | | | | | | Most other arm_mem_* are functions, convert arm_mem_scratch to a function as well. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add arm_mem_optee()Sascha Hauer2023-05-221-0/+5
| | | | | | | We have several functions/macros named arm_mem_* returning the different addresses for early memory locations. Add one for OP-Tee as well. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: put scratch mem area below OP-TEESascha Hauer2023-05-221-2/+2
| | | | | | | We want to reserve memory for OP-TEE at the end of available SDRAM, so move the scratch area below OP-TEE and not above. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: rename __arm_mem_scratch to arm_mem_scratchSascha Hauer2023-05-221-2/+2
| | | | | | | There are different arm_mem_* macros/functions and only one of them has leading underscores. Remove them for consistency. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: remove unused defineSascha Hauer2023-05-221-4/+0
| | | | | | __ARM_SETUP_STACK isn't used anywhere. Remove it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: remove unused membase argumentSascha Hauer2023-05-221-17/+12
| | | | | | | | | The functions determining the different memory locations for stack, early malloc, ttb and op-tee all take a membase argument which is unused as all locations depend on the end of memory. Remove this unused argument. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: error out if __LINUX_ARM_ARCH__ is undefinedAhmad Fatoum2023-04-171-0/+9
| | | | | | | | | | | | | | | | | With recent multiarch (really, multiplatform) rework, oldconfig will reask users what platforms they want to build for. The default is N, so holding return (or an olddefconfig) will just disable all boards and with it all CPUs leading to a cryptic torrent of: arch/arm/include/asm/swab.h:31:28: warning: "__LINUX_ARM_ARCH__" is not defined, evaluates to 0 [-Wundef] 31 | #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6 | ^~~~~~~~~~~~~~~~~~ Make user experience a bit better by printing an error message instead. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230414171421.1745965-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: implement of_optee_fixup helper functionAhmad Fatoum2023-03-101-0/+18
| | | | | | | | | This function can be called by board-code after checking whether OP-TEE was installed or not. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230307093426.1551193-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: bcm283x: Only provide PUTC_LL() when activatedSascha Hauer2023-03-071-2/+4
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: vexpress: Only provide PUTC_LL() when activatedSascha Hauer2023-03-071-2/+4
| | | | | | Add a Kconfig symbol for the vexpress debug_ll UART port Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: stm32mp: Only provide PUTC_LL() when activatedSascha Hauer2023-03-071-2/+4
| | | | | | | | | | | | With multi-arch support we must make sure we provide exactly one PUTC_LL() function as indicated by the "Kernel low-level debugging port" Kconfig choice. Make sure that the stm32mp specific debug_ll.h only provides PUTC_LL() when specified. The stm32mp specific debug_ll.h also provides other functions needed by board code regardless if the stm32mp debug_ll port is enabled or not, so include it explicitly where needed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: zynqmp: Add multi-arch supportSascha Hauer2023-03-071-2/+4
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: omap: Only provide PUTC_LL() when activatedSascha Hauer2023-03-071-2/+4
| | | | | | | | | | | | With multi-arch support we must make sure we provide exactly one PUTC_LL() function as indicated by the "Kernel low-level debugging port" Kconfig choice. Make sure that the omap specific debug_ll.h only provides PUTC_LL() when specified. The omap specific debug_ll.h also provides other functions needed by board code regardless if the omap debug_ll port is enabled or not, so include it explicitly where needed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Rockchip: Only provide PUTC_LL() when activatedSascha Hauer2023-03-071-2/+4
| | | | | | | | | | | | With multi-arch support we must make sure we provide exactly one PUTC_LL() function as indicated by the "Kernel low-level debugging port" Kconfig choice. Make sure that the Rockchip specific debug_ll.h only provides PUTC_LL() when specified. The Rockchip specific debug_ll.h also provides other functions needed by board code regardless if the Rockchip debug_ll port is enabled or not, so include it explicitly where needed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Only provide PUTC_LL() when activatedSascha Hauer2023-03-071-2/+4
| | | | | | | | | | | | With multi-arch support we must make sure we provide exactly one PUTC_LL() function as indicated by the "Kernel low-level debugging port" Kconfig choice. Make sure that the i.MX specific debug_ll.h only provides PUTC_LL() when specified. The i.MX specific debug_ll.h also provides other functions needed by board code regardless if the i.MX debug_ll port is enabled or not, so include it explicitly where needed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-24 12:46:15 +0000