| Commit message (Collapse) | Author | Age | Files | Lines |
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This adds memset_io(), memcpy_fromio() and memcpy_toio(). These have not
been defined for ARM64 previously. The code is directly taken from the
Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210622075413.6659-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Applying overlays in blspec currently works in two steps. First
of_firmware_load_overlay() is called which doesn't load an overlay,
but instead loads firmware when one is needed by the overlay. This
is done on the live tree, because that was needed to find the firmware
manager. The second step is to call of_register_overlay() to apply
the overlay to the kernel device tree when the fixups are executed.
Instead of using a separate step to load the firmware, load the firmware
as part of the of_fixups.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210624085223.14616-14-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Abort booting in time when doing a dryrun boot.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210623043726.8620-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Linux on RISC-V adopts the same structure as on ARM64 for both 32-
and 64-bit kernel images and it's likely future architectures will
as well. In preparation for adding RISC-V Linux boot support,
move the bulk of the code to a common location for reusability.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210504104513.2640-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The 1: is a left-over from before 5f04e5e03e94 ("ARM: aarch64: Fix
get_runtime_offset after relocation"). It's unused now, so drop it.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Implement initjmp() for use with the incoming bthread support.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds KASan support to the ARM architecture. What we are doing is:
* Add __no_sanitize_address attribute to various lowlevel functions
which do not run in a proper C environment
* Add non-instrumented variants of memset/memcpy (prefixed with '__')
* make original memcpy/memset weak symbols so strong definitions in
lib/kasan/common.c can replace them
* Use non-instrumented memcpy in early functions
* call kasan_init()
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Converts the files that licensecheck can determine the license for. Also
convert to obvious right Copyright statements. Additionally some minor
code reformatting is done.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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According to Marc Zyngier, former employee at ARM, the company owns the
copyright for code created by its employees. Convert accordingly to SPDX
with the usual rearrangements. Also dropped Marc's email address which
doesn't work any more.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97
("Remove the CREDITS file"). Remove references to it from several files.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add the image type handler to the ARM64 boot code. The only difference
in the boot handling is that we need to look at the FIT loaded OS image
header to get the image load and text offsets, as the os_header is the
FIT header, not the kernel header.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds basic support for passing intird to Linux
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We have many different pointer arrays which we put into linker sections
and each time there's one added we have to adjust all linker scripts.
This adds a common RO_DATA_SECTION define and uses it for all
architectures. This makes it easier to add a new linker array.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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No need to repeat the pci fixup sections in each linker script. Add a
define for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For the older section defines we specify the start and end addresses
outside the macro which means we have to repeat them in each linker
script. Make the start/end addresses part of the define to simplify
things. While at it, add a BAREBOX_ prefix to the INITCALLS and EXITCALLS
macros for consistency to the other defines.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
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The BAREBOX_CLK_TABLE and BAREBOX_DTB macros are defines that do not
take a parameter, so we can remove the braces.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The __image_start and __image_end marker are used by barebox to
calculate the size of the barebox binary inside the RAM. Without the
definitions barebox calculates its own size to zero, which works until a
certain size is exceeded, than the PBL will place the binary lower into
memory than the calculation inside barebox.
Fix this by adding the appropriate image markers to the linker script.
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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get_runtime_offset shall return the offset between the address we are
running at and the address we are linked at. This value obviously
changes when we relocate the binary. cf3b09737b tried to avoid using
R_AARCH64_RELATIVE relocations, but in fact this is exactly what the
function needs to work. Consider barebox starting at 0x10000000
when we are linked at 0x0 then get_runtime_offset() should return
0x10000000 before relocate_to_current_adr(), but afterwards it should
return 0x0.
This patch brings back the previously removed "a" flag. Since gcc5
doesn't put the values of R_AARCH64_RELATIVE fixup'd relocations
into the binary but zeroes instead, we help ourselves by basing
get_runtime_offset on an address which actually is zero. With
CONFIG_RELOCATABLE=y the binary is always linked to 0x0, so _text
is initially zero.
Tested with gcc-5.4.0 (which was "fixed" by cf3b09737b) and gcc-8.2.1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
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PBL often needs a way to udelay execution. Since we have a generic timer
in ARMv8 we can implement a generic udelay.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add PCI fixups section to linker script, so it would be possible to
enable PCI support.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since get_runtime_offset() is executed as a part of reloaction logic,
it cannot have code dependend on any kind of
relocation. Unfortunately, current codebase violates this rule and
linkadr:
.quad get_runtime_offset
ends up producing R_AARCH64_RELATIVE relocation that has to be
resolved at runtime. From tiral and error experimentation it seems
that the simplest way to do this is to drop "a" (allocatable)
attribute fom the section directive in runtime-offset.S
With "a" (see first entry):
aarch64-linux-gnu-objdump -R images/start_zii_imx8mq_dev.pbl
images/start_zii_imx8mq_dev.pbl: file format elf64-littleaarch64
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000000000b0 R_AARCH64_RELATIVE *ABS*+0x00000000000000a0
0000000000004258 R_AARCH64_RELATIVE *ABS*+0x0000000000028118
0000000000004260 R_AARCH64_RELATIVE *ABS*+0x0000000000028128
00000000000042e0 R_AARCH64_RELATIVE *ABS*
00000000000042e8 R_AARCH64_RELATIVE *ABS*+0x0000000000028118
00000000000042f0 R_AARCH64_RELATIVE *ABS*+0x00000000000042c8
Without "a":
aarch64-linux-gnu-objdump -R images/start_zii_imx8mq_dev.pbl
images/start_zii_imx8mq_dev.pbl: file format elf64-littleaarch64
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
0000000000004258 R_AARCH64_RELATIVE *ABS*+0x0000000000028100
0000000000004260 R_AARCH64_RELATIVE *ABS*+0x0000000000028110
00000000000042e0 R_AARCH64_RELATIVE *ABS*
00000000000042e8 R_AARCH64_RELATIVE *ABS*+0x0000000000028100
00000000000042f0 R_AARCH64_RELATIVE *ABS*+0x00000000000042c8
Note that on recent toolchains (tested on 8.1.1), this problem is
masked by the fact that
.quad get_runtime_offset
will be initialized with link-time value of "get_runtime_offset" in
addition to having a R_AARCH64_RELATIVE relocation.
00000000000000a0 <get_runtime_offset>:
a0: 10000000 adr x0, a0 <get_runtime_offset>
a4: 58000061 ldr x1, b0 <linkadr>
a8: eb010000 subs x0, x0, x1
ac: d65f03c0 ret
00000000000000b0 <linkadr>:
b0: 000000a0 .word 0x000000a0
b4: 00000000 .word 0x00000000
_However_, older toolchains (tested on 5.5.0), will only issue a
R_AARCH64_RELATIVE, so memory location will contain only zeroes:
00000000000000a0 <get_runtime_offset>:
a0: 10000000 adr x0, a0 <get_runtime_offset>
a4: 58000061 ldr x1, b0 <linkadr>
a8: eb010000 subs x0, x0, x1
ac: d65f03c0 ret
00000000000000b0 <linkadr>:
...
This leads to an very early crash and complete boot failure in the
latter case.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Commit e1287b1a8b27 ("arm: rework lib directory to support arm64")
restructured the lib directory and added the lib64 directory. It moved
the existing .gitignore to the lib32 directory but didn't add a new
.gitignore for lib64.
Thus building Barebox for arm64 results in stray barebox.lds files.
Copy the .gitignore from lib32 to lib64.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Include header for unwind_backtrace prototype and mark dump_backtrace_entry
as static.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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It is not always desired to get the devicetree from image data and load
it to a SDRAM region at the same time. Sometimes it's enough to just
load it to an allocated address (in case the user has no constraints
where the devicetree should be placed.
This patch splits bootm_load_devicetree into bootm_get_devicetree which
returns a pointer to the allocated devicetree and bootm_load_devicetree
which loads the devicetree to a specified region.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Optimized version of memset() in memset.S if called as:
memset(foo, 0, size)
will try to explicitly zero out data cache with:
dc zva, dst
which will result in Alignement Exception (DABT) if MMU is not
enabled.
For more info see:
- C4.4.8 "DC ZVA, Data Cache Zero by VA"
- D5.2.8 "The effects of disabling a stage of address translation"
in "ARM Architecture Reference Manual. ARMv8, for ARMv8-A architecture
profile"
In similar vein, using optimized version of memcpy() could lead to a
unaligned 16-byte write (using 'stp'), which is not allowed for
Device-nGnRnE type of memory (see D5.2.8) and would liead to
Alignement Exception.
To fix both problems expose non-optimized and optimzied versions of
the function and created a wrapper to dispatch the call to either one
based on if MMU is enabled or not.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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aarch64 has its own image format. Add a bootm handler to handle this
format. Also add a barebox handler.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Implement stacktraces as a great debugging aid. On aarch64 this is cheap
enough to be enabled unconditionally. Unwinding code is taken from the
Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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CONFIG_ARM_UNWIND does not exist for aarch64. Remove the dead code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ld_var solves the issue that when compiled with -pie the linker
provided variables are all 0x0. This mechanism however refuses to
compile with aarch64 support.
This patch replaces the ld_var mechanism with a nice little trick
learned from U-Boot: Instead of using linker provided variables
directly with "__bss_start = ." we put a zero size array into
a separate section and use the address of that array instead of
the linker variable. This properly works before relocation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The RATP implementation now allows executing generic commands with a
binary interface: binary requests are received and binary responses
are returned.
Each command can define its own RATP request contents (e.g. to specify
command-specific options) as well as its own RATP response contents
(if any data is to be returned).
Each command is associated with a pair of numeric unique request and
response IDs, and for easy reference these IDs are maintained in the
common ratp_bb header. Modules may override generic implemented
commands or include their own new ones (as long as the numeric IDs
introduced are unique).
Signed-off-by: Aleksander Morgado <aleksander@aleksander.es>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch contains the barebox implementation for the ARM
"Power State Coordination Interface" (PSCI).
The interface is aimed at the generalization of code in the following
power management scenarios:
* Core idle management.
* Dynamic addition and removal of cores, and secondary core boot.
* big.LITTLE migration.
* System shutdown and reset.
In practice, all that's currently implemented is a way to enable the
secondary core one some SoCs.
With PSCI the Kernel is either started in nonsecure or in Hypervisor
mode and PSCI is used to apply power to the secondary cores.
The start mode is passed in the global.bootm.secure_state variable. This
enum can contain "secure" (Kernel is started in secure mode, means no
PSCI), "nonsecure" (Kernel is started in nonsecure mode, PSCI available)
or "hyp" (Kernel is started in hyp mode, meaning it can support
virtualization).
We currently only support putting the secure monitor code into SDRAM,
which means we always steal some amount of memory from the Kernel.
To keep things simple for now we simply keep the whole barebox binary in
memory
The PSCI support has been tested on i.MX7 only so far. The only
supported operations are CPU_ON and CPU_OFF.
The PSCI and secure monitor code is based on the corresponding U-Boot
code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ARM64 has native instructions for division and thus doesn't need the
helper functions implemented in those files.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This commit create a common directory, lib/,
for arm and arm64 common code.
It also create lib32/ and lib64/ for 32bit
and 64bit code respectively.
Signed-off-by: Raphael Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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