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* arm: imx8mp: add karo electronics qsxp-ml81 som supportMarc Kleine-Budde2024-03-131-0/+10
| | | | | | | | | | | | The Ka-Ro QSXP is a i.MX8M Plus solder down system on module. This commit adds support for the SOM on the QSBASE4 RDK. [1]: https://www.karo-electronics.de/qsxp Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de> Link: https://lore.barebox.org/20240311-karo-imx8mp-som-board-upstreaming-v2-6-6ecda693adb2@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MP: add König+Bauer AlphaJet boardJohannes Zink2024-03-131-0/+14
| | | | | | | | | | | | | Add basic support for König+Bauer AlphaJet, based on a Congatec QMX8MP SoM with an i.MX8MP SoC in the Industrial Temperature Grade 4GB Variant, no inline ECC used. Co-Developed-by: Juergen Borleis <j.borleis@pengutronix.de> Signed-off-by: Juergen Borleis <j.borleis@pengutronix.de> Signed-off-by: Johannes Zink <j.zink@pengutronix.de> Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20240311140455.3094462-1-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tqma6ul: use upstream device treesSascha Hauer2024-03-131-0/+2
| | | | | | | | | | | | | | | | | The tqma6ul has several upstream device trees depending on the exact board type. This removes the downstream device tree in favour for the upstream device trees. The board type can be determined from an EEPROM on the board. This patch also adds support for reading the EEPROM and picking the right device tree for the board found. The EEPROM has the board described as strings. I do not know the correct strings for the boards I don't have, so right now only the device tree for the "TQMa6UL2L-AB.0202" board is picked. A warning is printed when an unknown board type is found, so this can be added as new board type when found. Link: https://lore.barebox.org/20240221150323.2715164-9-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx'Sascha Hauer2024-02-211-2/+11
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| * hab: implement i.MX9 supportSascha Hauer2024-02-161-0/+5
| | | | | | | | | | | | | | | | | | While the underlying architecture of AHAB is quite different than HAB, the user interface fits into the existing hab command quite well, so integrate it into the existing HAB infrastructure. Link: https://lore.barebox.org/20240213151744.307958-7-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: tqma93xx: Add LGA board variantSascha Hauer2024-02-131-0/+3
| | | | | | | | | | | | | | | | | | The LGA variant needs different DDR setup and another device tree. The board type can be read from EEPROM, so we don't need another image for it. Link: https://lore.barebox.org/20240205074553.2005284-9-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX9: rename TQ i.MX93 board to TQMA93XXSascha Hauer2024-02-131-2/+2
| | | | | | | | | | | | | | | | | | | | The TQ i.MX93 boards come in different variants, all of which can be identified with an EEPROM. We can support all variants in a single image, so rename the tqmba9xxxca, which is only one variant, to TQMA93XX which can be used as a name covering all variants. Link: https://lore.barebox.org/20240205074553.2005284-8-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX8M: convert the machine init to the soc driverMarco Felsch2024-01-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the i.MX8M machine init code to the previously introduced soc framework. The soc driver was mostly copied from Linux with slightly adaptions for barebox. To the soc driver is called during the postcore_initcall to keep the level aligned with the previous imx_init(). The ocotp clock must keept running else the ARM-SMCCC stuck for calls where the TF-A tries to access the ocotp. A sample output of the new introduced soc0 device: | | barebox@FSL i.MX8MM EVKB:/ devinfo soc0 | Bus: soc | Parameters: | family: Freescale i.MX (type: string) | machine: FSL i.MX8MM EVKB (type: string) | revision: 1.0 (type: string) | serial_number: 15182A09DAB5B3C9 (type: string) | soc_id: i.MX8MM (type: string) Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20240125133856.3792552-2-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX: add Kconfig option for scratchmemSascha Hauer2024-02-081-0/+4
|/ | | | | | | | | | scratch.c is needed for both i.MX8 and i.MX9, but is compiled only for i.MX8, so linking will failed if only i.MX9 is enabled. Add a Kconfig option for it and select it from both i.MX8 and i.MX9. Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20240205125728.2470228-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: select CLKDEV_LOOKUP from COMMON_CLKAhmad Fatoum2024-01-191-1/+0
| | | | | | | | | | All platforms that select COMMON_CLK also select CLKDEV_LOOKUP, therefore just select it in drivers/clk/Kconfig and drop the CLKDEV_LOOKUP all over the place. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240118090718.1314156-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: dts: add support for and Gossen Metrawatt e143_01Roland Hieber2023-12-051-0/+8
| | | | | | | | | | | | | The e143_01 is based on the Variscite VAR-SOM-MX7. Re-use the kernel device tree, add environment and state partitions, and a barebox-update handler for the eMMC. The DDR setup has been ported from the vendor U-Boot: <https://github.com/varigit/uboot-imx/blob/imx_v2017.03_4.9.11_1.0.0_ga_var01/board/variscite/mx7dvar_som/imximage.cfg> Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20231127214818.3751722-3-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add TQ MBA9XXXCA board supportSascha Hauer2023-11-201-0/+9
| | | | | | | | The TQ MBA9XXXCA is a i.MX93 based board, see https://www.tq-group.com/de/produkte/tq-embedded/arm-architektur/stka93xx/ Link: https://lore.barebox.org/20231110125800.1901232-17-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: initial i.MX9 supportSascha Hauer2023-11-201-0/+21
| | | | | Link: https://lore.barebox.org/20231110125800.1901232-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* usb: gadget: i.MX: Move PBL USB gadget driver to arch/Sascha Hauer2023-11-131-0/+3
| | | | | | | | | | | | | The i.MX PBL USB gadget driver is currently selected by architecture Kconfig options. When USB gadget support is disabled then the build system doesn't descend into the directory where the driver is, leading to undefined references. We could change that and descend into the directory unconditionally, but as the driver doesn't have any dependencies to the USB gadget framework we can also move the driver to arch/arm/mach-imx/ to solve this problem. Link: https://lore.barebox.org/20231110130246.2222936-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: lds: add support for a 2nd CSF areaMarco Felsch2023-10-181-0/+6
| | | | | | | | | | | | | | | | | | Extend the CSF area to be able two store two CSF slots. The 2nd CSF slot is required in case of FlexSPI HAB boot support. The first slot is used for the MMC-IVT + barebox-pbl; the 2nd slot is used for the FlexSPI-IVT + barebox-pbl. This is necessary because of the fact that the HAB ROM code requires that the IVT is signed as well. Make the 2nd CSF slot optional since early SRAM space is limited and 4K can make a difference here. Please check the documentation for a more detailed information about the i.MX8M image layout. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20231017145131.3069283-15-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: allow HAB for i.MX8M familyRouven Czerwinski2023-10-181-2/+2
| | | | | | | | | Since the HAB driver can now parse events for the complete family, allow selection for the whole family. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Link: https://lore.barebox.org/20231017145131.3069283-8-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: HABv4: point out i.MX6 specifics in docs and Kconfig help textAhmad Fatoum2023-09-211-4/+7
| | | | | | | | | | | | | | | | Signed USB images are a i.MX6 quirk as we need a point to DCD for imx-usb-loader to work with, but the DCD pointer needs to be invalidated for actual boot. On i.MX8M*, RAM setup can't be done completely by DCD anymore, so not having a DCD table is the norm and we don't need a signed USB image. Thus mark CONFIG_HABV4_IMAGE_SIGNED_USB i.MX6 only and while at it, fix hardcoded instances of i.MX6 headers. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230921075511.2098569-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MM: add Phytec i.MX8MM SoM supportMarc Kleine-Budde2023-09-041-0/+13
| | | | | | Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.barebox.org/20230809-phytec-som-imx8mm-v4-3-b9d4759582d8@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add Skov i.MX8MP based board supportOleksij Rempel2023-08-181-0/+10
| | | | | | | | | | | | | | Add basic support for the Skov i.MX8MP based system. This is initial support and will be extended later at least with board version detection. The compatible used in the board file is for barebox specific generic devicetree which is expected to work with all Skov i.MX8MP based boards. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230814121234.2405038-1-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MP: Add help text in KconfigMarco Felsch2023-07-041-1/+3
| | | | | | | | | Add help text to Kconfig and change wording in option to mention that the option supports multiple boards. Link: https://lore.barebox.org/20230704104048.652650-1-m.felsch@pengutronix.de Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* firmware: don't hardcode firmware paths in srctree for existence checkAhmad Fatoum2023-06-281-49/+0
| | | | | | | | | | | | | | | | | | | Now that PBL firmware can be made optional, we can drop the existence checks in the Kconfig. These were flawed anyway, because they didn't take CONFIG_EXTRA_FIRMWARE_DIR into account and they led to issues with build system recipes that didn't expect firmware to be required before compilation step at oldconfig/menuconfig time. This effectively reverts commits: 624962fb45c6 ("ARM: i.MX: make boards selectable only when firmware files are present") 4ff2e5510ec9 ("ARM: Rockchip: make boards only selectable when firmware is present") 41a89611774a ("ARM: rockchip: don't attempt building MACH_RADXA_ROCK5 without firmware") Reported-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230627055239.3908872-8-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: make boards selectable only when firmware files are presentSascha Hauer2023-05-041-0/+49
| | | | | | | | | Some i.MX boards need firmware files in the source tree. Make the boards depending on firmware files selectable only when the firmware is there to avoid failing compilation. Link: https://lore.barebox.org/20230426090354.1350981-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: move board selection into menuSascha Hauer2023-03-071-1/+3
| | | | | | | Other multi-arch architectures show the boards in a submenu. Do likewise for consistency. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: let boards depend on 32/64bitSascha Hauer2023-03-021-1/+8
| | | | | | | | | So far we can enable support for 32bit and 64bit SoCs at the same time which results in an unbuildable barebox. This is annying, let the board visibility depend on the selected code model. Link: https://lore.barebox.org/20230302124731.2081045-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Sort board Kconfig entriesSascha Hauer2023-03-021-174/+194
| | | | | | | | Sort the board Kconfig enttries by SoC type and boards within the SoC type alphabetically. Link: https://lore.barebox.org/20230302124731.2081045-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Remove config CONFIG_ARCH_TEXT_BASESascha Hauer2023-03-021-23/+0
| | | | | | | | | CONFIG_ARCH_TEXT_BASE is only used when CONFIG_RELOCATABLE is disabled which is not the case for i.MX. Remove the unused Kconfig option. Link: https://lore.barebox.org/20230302105225.943524-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Remove old boardsSascha Hauer2023-03-021-237/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes a bunch of old boards that nobody showed interest in for a long time: Freescale boards ================ MACH_IMX21ADS MACH_IMX27ADS MACH_FREESCALE_MX25_3STACK MACH_FREESCALE_MX35_3STACK MACH_FREESCALE_MX53_SMD Eukrea boards ============= MACH_EUKREA_CPUIMX25 MACH_EUKREA_CPUIMX27 MACH_EUKREA_CPUIMX35 MACH_EUKREA_CPUIMX51SD Garz+Fricke boards ================== MACH_NESO MACH_GUF_CUPID Phytec boards ============= MACH_PCM037 MACH_PCM043 Amazon boards ============= MACH_KINDLE3 All these boards have not been converted to device tree nor do they support multi-image generation. As they are becoming a maintenance burden remove them now. A board can always be added back once it is ported to support the recent barebox interfaces. Link: https://lore.barebox.org/20230302105225.943524-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: IMX8MP: add initial support for Variscite DT8MCustomBoard with iMX8MPMichael Kopfensteiner2023-02-271-0/+10
| | | | | | | | | | | | | | | | | | | | | The Variscite DT8MCustomBoard is an eval board for the several Variscite SOMs of their "DART" product line. This commit adds support for that baseboard in combination with a DART-MX8M-PLUS SOM. The commit contains an adapted version of the vendors device tree [1] and the vendors DDR timings, taken from Variscite's public U-Boot sources [2]. Both files have been slightly changed to integrate well with barebox. The boardsupport added with this commit does not yet support every feature of the DT8MCustomBoard. Yet it already supports all basic necessities to make use of barebox. [1] https://github.com/varigit/linux-imx/tree/3f94f35bda827e8aa06beadb10c77358cfb6dad9 [2] https://github.com/varigit/uboot-imx/tree/7cad2ff68a508c71c572151a85bc786711bab969 Signed-off-by: Michael Kopfensteiner <michael.kopfensteiner@vahle.com> Link: https://lore.barebox.org/20230223153601.59357-2-michael.kopfensteiner@vahle.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MP: add initial Polyhex DEBIX Model A supportAhmad Fatoum2023-02-101-0/+10
| | | | | | | | | | | | | | | | The Polyhex DEBIX Model A is an i.MX8MP based Rpi form factor board. This commit imports the v6 of the Linux device tree[1], and the timings from the vendor U-Boot[2] and combines it with existing barebox i.MX8MP support. [1]: https://lore.kernel.org/all/20221213152024.2638377-4-dan.scally@ideasonboard.com/ [2]: https://github.com/debix-tech/uboot/blob/lf_v2021.04/board/freescale/imx8mp_evk/lpddr4_timing.c Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> [lst: cleaned up WIP patch] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Link: https://lore.barebox.org/20230208133519.1114700-2-l.stach@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX Riotboard: Let phy driver initialize the phySascha Hauer2023-02-071-0/+1
| | | | | | | The phy setup done in the board code is done by the phy driver already, so drop the board code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: novena: Use DDR3 information from SPD EEPROMJohn Watts2023-02-031-0/+2
| | | | | | | | | | | | | | | | | | | The Novena supports swappable memory which means we must query the memory for configuration details. This patch uses values stored in the SPD EEPROM to configure the i.MX6 memory controller. If the SPD can't be read, the default configuration for a 4GB stick is used. This is the same type of stick that comes with the board. Calibration for the installed stick is run unconditionally. Verification that this works was done by comparing MMDC registers before and after and carefully reading other people's source code. Signed-off-by: John Watts <contact@jookia.org> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230202075741.2350028-5-contact@jookia.org Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: novena: Add Kosagi Novena boardJohn Watts2023-02-031-0/+7
| | | | | | | | | | | | The Kosagi Novena is an open source laptop released in 2014. This patch adds the initial project skeleton for running the PBL and debugging over the UART2 port (labeled DEBUG on the board.) Signed-off-by: John Watts <contact@jookia.org> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230202075741.2350028-2-contact@jookia.org Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8M: init CAAM when CONFIG_FSL_CAAM_RNG_PBL_INITAhmad Fatoum2023-01-121-0/+1
| | | | | | Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230111075940.922817-8-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8M: implement bootrom log viewing commandAhmad Fatoum2022-12-071-0/+1
| | | | | | | | | | | | | | | | | | The ROM event log[1] of the i.MX8M* can help with debugging boot failures as it lists various information about boot mode, image, fallback and recovery as well as timestamps when some actions along the boot process occurred. Add a new bootrom -l command that supports reading this out. A generic name is intentionally chosen, as other SoCs also provide similar functionality and it would be nice if they can just reuse the name and command line arguments in future. [1]: NXP AN12853 "i.MX ROMs Log Events" Rev. 0 - May 2020 Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20221101180643.244270-6-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8M: support saving BootROM event log before clobbering OCRAMAhmad Fatoum2022-12-021-0/+3
| | | | | | | | | | | | | | | | The ROM event log[1] is a data structure populated by the i.MX BootROM on i.MX6 and later. It's found by dereferencing a 32-bit address at a fixed location within the BootROM. If valid, this address will point into the On-Chip SRAM. On the i.MX8M, we load the ARM trusted firmware into the On-Chip SRAM and may end up overwriting the BootROM event log, before the user has a chance to parse it. Thus save the BootROM log into the newly defined i.MX scratch space for later usage. [1]: NXP AN12853 "i.MX ROMs Log Events" Rev. 0 - May 2020 Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20221101180643.244270-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mach-imx: Add missing ocotp dependency to protonic-imx6 platformRobin van der Gracht2022-11-041-0/+1
| | | | | | | | | The protonic-imx6 board code calls imx_ocotp_read/write_field functions. Compiling without IMX_OCOTP results in a build failure. Signed-off-by: Robin van der Gracht <robin@protonic.nl> Link: https://lore.barebox.org/20221102135314.123789-1-robin@protonic.nl Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MP: add TQ mba8mpxl boardHolger Assmann2022-10-281-0/+10
| | | | | | | | | | | | | | | | | | | | | | This commit adds support for the TQ MBa8MPxL with TQMa8MPxL module with i.MX8M Plus Quad/Dual SoC. This very combination results in configuration symbol "MACH_TQ_MBA8MPXL". A possible variant based on i.MX8M Plus Dual would be supported transparently, once barebox deleted the CPU nodes when it detects that they were fused away. It already does so for i.MX8MM and i.MX8MN. We use the respective Linux upstream device trees and their implications regarding hardware support. Known to be unsupported for now is the second Ethernet interface around the eqos dwmac IP. This has to be resolved by porting over the fitting wrapper from Linux. Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Signed-off-by: Holger Assmann <h.assmann@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20221026093845.304181-1-h.assmann@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MM: innocomm-wb15: imply AT803X_PHY for EVKAhmad Fatoum2022-10-271-0/+1
| | | | | | | | | | | | | EVK has Atheros 8035 Ethernet PHY and DHCP times out when using the generic PHY driver instead of the at803x driver. Link is detected with both though. Make user lives easier by adding an imply to the PHY driver when the board is selected. This is chosen instead of a select to allow users to disable the driver if they use a different base board for the SoM. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20221024141203.2473619-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: boards: Skov-i.MX6: select KSZ8873 switch driverOleksij Rempel2022-10-041-0/+2
| | | | | | | | | The board code depends now on the switch driver probe functionality. If this driver is not enabled, we will make wrong decision. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20220926081740.76968-6-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MM: add InnoComm WB15 supportAhmad Fatoum2022-09-131-0/+11
| | | | | | | | | | | | | | | | | | | | The InnoComm WB15-EVK is a Rpi form factor board built around the i.MX8MML-based WB15 SoM. Add basic board support. The dts files are split up into three files: - imx8mm-innocomm-wb15.dtsi: This is the SoM dtsi file - imx8mm-innocomm-wb15-evk-upstream.dts: base board dts file, generic part - imx8mm-innocomm-wb15-evk.dts: base board dts file, barebox specific part The former two are currently under upstream review and can be replaced by the upstream version once merged. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20220901143534.2219624-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2022-08-111-1/+0
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| * ARM: boards: ccmx51: Remove unused KConfig optionAlexander Shiyan2022-06-301-1/+0
| | | | | | | | | | | | | | | | RELOCATABLE is already selected by IMX_MULTI_BOARDS Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.barebox.org/20220627102500.18427-9-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX8MP: remove select for unused ARC PBL USB gadget driverAhmad Fatoum2022-08-081-1/+0
| | | | | | | | | | | | | | | | | | | | | | The i.MX8MPlus uses the ROM API for chainloading over the USB, so there is no use for the USB_GADGET_DRIVER_ARC_PBL. Besides, it is not even applicable, because the OTG controller on the i.MX8MPlus is a Designware Controller. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220730095353.1778157-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX7: add 96Boards Meerkat96 supportJohannes Zink2022-07-121-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | This is a i.MX7D-based board with an upstream device tree. Add the necessary boilerplate to have barebox create an image. The memory settings are taken from U-Boot v2022.07-rc6. System reset requires pmic driver which is not available yet in barebox. Signed-off-by: Johannes Zink <j.zink@pengutronix.de> Link: https://lore.barebox.org/20220711141246.3331160-2-j.zink@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX8M: select ARM_USE_COMPRESSED_DTB for all boardsAhmad Fatoum2022-07-051-2/+1
|/ | | | | | | | | | | | | | With DDR firmware, ARM trusted firmware and possibly OP-TEE, we are already quite short on SRAM, so it makes sense to always use compressed device trees on the i.MX8M to shift some of the size from PBL into barebox proper. Select ARM_USE_COMPRESSED_DTB for the i.MX8M boards. Follow-up commit will touch all i.MX8M boards we have in tree that do not yet make use of this. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220704092409.124836-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: cpu: remove unnecessary CONFIG_SYS_SUPPORTS_64BIT_KERNELAhmad Fatoum2022-06-171-1/+0
| | | | | | | | | | For ARM, SYS_SUPPORTS_64BIT_KERNEL is selected exclusively by symbols that also select CPU_SUPPORTS_64BIT_KERNEL, so we can drop SYS_SUPPORTS_64BIT_KERNEL safely. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220609055922.667016-12-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: cpu: prevent recursive dependencies via CPU_SUPPORTS_64BIT_KERNELAhmad Fatoum2022-06-171-0/+1
| | | | | | | | | | | | | For ARM, CONFIG_CPU_SUPPORTS_64BIT_KERNEL's only function, along with CONFIG_SYS_SUPPORTS_64BIT_KERNEL is to control visibility of the 64BIT symbol. Select it from CPU_V8 is detrimental, because subarches may want to select CPU_SUPPORTS_64BIT_KERNEL unconditionally and select CPU_V8 only if 64BIT was chosen. This currently leads to a recursive dependency, so break this up. No functional change just yet. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220609055922.667016-11-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: add support for TQMa6UL SoM on MBa6ulxlRouven Czerwinski2022-02-161-0/+5
| | | | | | | | | | | Add support for a TQMA6UL2L SoM on top of a MBa6ulxl baseboard. The imxcfg header is for the LGA variant, the downstream U-Boot has an ifdef for another "standard" variant, however this is not included here since I don't have hardware to test. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Link: https://lore.barebox.org/20220211100224.2395887-1-r.czerwinski@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: add SPDX-License-Identifier for Kbuild/KconfigAhmad Fatoum2022-01-051-0/+2
| | | | | | | | | | | | | | | To verify only Kconfig/Makefile is touched: git show --numstat --format=oneline HEAD | grep -v 'Kconfig\|Makefile' will print only arch/powerpc/Kbuild. To verify nothing unexpected is added: git show -U0 | grep '^-[^-]\|^+[^+]' | sort -u Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220103120539.1730644-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MN: add i.MX8MN-EVK supportAhmad Fatoum2021-10-051-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With driver support in place, we can now build and run barebox in the i.MX8MN. Following tested working: - Setting up DDR4 SDRAM - Booting from SD-Card - Booting from eMMC - Updating barebox in SD-Card/eMMC boot partition - USB Fastboot, ACM gadgets - UART - Early I2C with bd71837 - Ethernet - Loading and communicating with TF-A The resulting image supports both DDR4 and LPDDR4. They use different PMICs, so probing the i2c addresses of them indicates what DRAM type to setup. I have only tested this on a DDR4 EVK, but the LPDDR4 code is equivalent to what's already used in barebox with i.MX8M Mini and Plus, so it should work(tm). Notably missing: - boot from USB SDP doesn't work. early debug_ll doesn't indicate that barebox PBL was actually entered. This can follow later though. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211001100949.6891-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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