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* ARM: i.MX: Add i.MX7 base architecture supportJuergen Borleis2017-01-201-0/+1
| | | | | Signed-off-by Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/vybrid'Sascha Hauer2017-01-121-13/+10
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| * i.MX: Move clk code from 'mach-imx' to 'drivers'Andrey Smirnov2017-01-111-12/+10
| | | | | | | | | | | | | | | | | | Move clk code from 'mach-imx' to 'drivers' to keep the code tree structure closer to that of analogous one from Linux kernel and, arguably although subjective, to keep 'mach-imx' less cluttered. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX: Add src fixupSascha Hauer2017-01-101-0/+1
|/ | | | | | | | | Some boards or SoCs need the SRC_SCR[WARM_RESET_ENABLE] bit cleared, otherwise they won't come up after a watchdog reset. This was observed on one i.MX6ul based custom board. The Linux Kernel does the same since 2012: 0575fb7 ARM: 7198/1: arm/imx6: add restart support for imx6q. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx'Sascha Hauer2016-11-141-0/+1
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| * ARM: i.MX6ul: Add clock supportSascha Hauer2016-11-081-0/+1
| | | | | | | | | | | | | | Nearly identical to Linux-4.8 clock support, only some unnecessary clocks skipped. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX53: Implement NAND xloadSascha Hauer2016-09-221-1/+1
|/ | | | | | | | | | | Some i.MX53 want to setup the SDRAM from C code rather than from DCD tables. The image size for these boards is limited to the internal SRAM size. To overcome this limitation for i.MX53 boards booting from NAND implement an xload mechanism to load only the PBL to SRAM and let barebox load the rest of the image itself after SDRAM has been initialized. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add i.MX50 supportAlexander Kurz2016-09-121-0/+2
| | | | | Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: xload: implement esdhc xload for i.MX6Sascha Hauer2015-07-311-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add SPI xload codeSascha Hauer2015-07-291-0/+1
| | | | | | | Add PBL xload code to load an image from SPI NOR flash. Currently implemented for i.MX6. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: compile boot.c for pbl aswellSascha Hauer2015-07-161-3/+2
| | | | | | | As boot.c now contains code for the pbl compile compile it there awell. While at it move esdctl.c to obj-pbl-y. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx-bbu-nand-fcb'Sascha Hauer2015-07-031-1/+0
|\ | | | | | | | | Conflicts: common/Kconfig
| * ARM: i.MX6: bbu nand: Move to common placeSascha Hauer2015-06-121-1/+0
| | | | | | | | | | | | The code can be used on i.MX28 aswell, so move it to a common place. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i.MX: Add provisions to boot from IRAMAndrey Smirnov2015-05-071-0/+1
|/ | | | | | | | | | | | | This commit add a very basic code to allow Barebox to be booted from IRAM. Given that the amount of IRAM on most i.MX variants is insufficient to contain a copy of Barebox with any reasonable degree of functionality this code uses IRAM only as a temporary location and eventually bootstraps from DRAM. But the presense of the intermediate IRAM-only stage allows to add provisions to test the area of DRAM that Barebox would be using to facilitate various testing scenarious. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add imx_clk_gate_exclusiveSascha Hauer2015-03-171-1/+1
| | | | | | | This adds support for two gates from can only exclusively be enabled. Based on the corresponding Linux code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add i.MX6sx supportSascha Hauer2014-11-271-0/+1
| | | | | | | | Add some cpu type defines and clock support. The clock support is very different from other i.MX variants, so it's a separate file, like done in the kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: add 2-bit gate clock supportDmitry Lavnikevich2014-11-241-1/+1
| | | | | | | Based on kernel clk-gate2 and barebox clk-gate implementations. Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: imx6: add cpu lowlevel init functionLucas Stach2014-06-261-0/+1
| | | | | | | | Enables all relevant errata workarounds for the i.MX6 SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: Add Nand boot bbu handlerSascha Hauer2014-04-031-0/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: Add ocotp driverSascha Hauer2013-07-221-0/+1
| | | | | | | The only functionality at the moment is to register a MAC Address for an ethernet device. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX51: Make imx51_init_lowlevel callable from early initSascha Hauer2013-06-181-0/+1
| | | | | | | imx_silicon_revision() can't be used from early init context, so use imx51_silicon_revision() instead. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/of'Sascha Hauer2013-05-061-9/+9
|\ | | | | | | | | Conflicts: arch/arm/mach-imx/Makefile
| * pinctrl: move imx-iomux-v1 to drivers/pinctrl/Sascha Hauer2013-04-231-3/+3
| | | | | | | | | | | | For consistency reasons. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * pinctrl: move imx-iomux-v2 to drivers/pinctrl/Sascha Hauer2013-04-231-1/+1
| | | | | | | | | | | | For consistency reasons. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * pinctrl: switch i.MX iomux-v3 support to pinctrlSascha Hauer2013-04-231-5/+5
| | | | | | | | | | | | | | | | | | This switches the iomux-v3 (found on i.MX25,35,51,53,6) to pinctrl support. The old SoC specific API is kept for compatibility. The pinctrl devicetree support is enabled automatically when OFDEVICE support is available. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX: Move GPIO driver to drivers/gpioAlexander Shiyan2013-04-221-1/+1
|/ | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx-realq7'Sascha Hauer2013-04-041-0/+1
|\ | | | | | | Fix realq7 compilation
| * ARM i.MX6: Add mmdc calibration supportSascha Hauer2013-03-111-0/+1
| | | | | | | | | | | | | | This adds support for the various DDR calibration functions in the i.MX6 MMDC. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX: Add bbu handler for external NAND bootSascha Hauer2013-03-121-0/+1
|/ | | | | | | | | | The external NAND boot code currently does not handle bad blocks correctly on 2k NAND flashes. This patch adds a barebox_update handler for external NAND boot which embeds a Bad block table in the flashed image. The boot code will skip bad blocks found in this bad block table then. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* switch boards to lwl-yJean-Christophe PLAGNIOL-VILLARD2013-02-211-5/+1
| | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX boards: switch to barebox_arm_entrySascha Hauer2013-02-041-1/+4
| | | | | | | Most i.MX boards can use the imx*_barebox_entry functions. The remaining (i.MX21, i.MX6) use hardcoded base addresses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: add esdctl-v4 supportSascha Hauer2012-12-061-2/+2
| | | | | | | | | | | | This adds support for initializing DDR3 RAMs on the i.MX53 type SDRAM controller. The code automatically detects size/layout of the connected RAM, detects the bus width and which chipselects are populated. While I believe this code is not 100% generic, it is far too sophisticated to stay in a single board directory. I'm sure other boards could make use of this aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add driver to get sdram base and sizeSascha Hauer2012-12-061-1/+2
| | | | | | | | | | The code initializing the SDRAM controller is not at the same place where SDRAM is registered with barebox. To reduce the risk of registering wrong SDRAM sizes this patch adds a driver for the ESDCTL which reads back the configured SDRAM size and registers the memory found with barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add barebox update handler for internal bootSascha Hauer2012-10-171-0/+1
| | | | | | | | | | | | | | | | | | | | This adds support for an update handler for internal boot. Currently handled are: - v1 MMC/SD - v2 MMC/SD - v2 NAND where v1 is found on i.MX25, i.MX35 and i.MX51. v2 is found on i.MX53. This code intentionally does not use the DCD data compiled into every i.MX internal boot image. This makes it possible to make a pure second stage barebox bootable on i.MX internal boot devices later. This has been tested on the i.MX51 babbage, i.MX53 loco and i.MX53 tx53 board. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX53: enable imx53_init_lowlevel for pblSascha Hauer2012-10-171-0/+1
| | | | | | | | | The KARO Tx53 board in the revision 8030 has an instable SDRAM setup. It works as long as the MMU is disabled, but the board crashes at arbitrary places once the MMU gets enabled. So we need the PLL setup early. Enable it for pbl. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx-work' into for-next/imxSascha Hauer2012-10-171-1/+1
|\ | | | | | | | | | | | | Conflicts: arch/arm/mach-imx/imx1.c Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX: streamline imx_silicon_revisionSascha Hauer2012-10-051-1/+1
| | | | | | | | | | | | | | | | All i.MX SoCs now use the same imx_silicon_revision() function to get the revision. Add a separate header file for it and a common function used on all SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM i.MX: move reset source detection codeSascha Hauer2012-10-081-1/+0
|/ | | | | | | | | - for i.MX1 the register is in the System Control unit, so move the code to arch/arm/mach-imx/imx1.c - for the other i.MX the register is in the watchdog unit, so move the code to drivers/watchdog/imxwd.c Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Remove old clock supportSascha Hauer2012-10-041-11/+9
| | | | | | | The old clock support is now unused. Remove it. The former i.MX clko command is superseeded by generic clock manipulation commands. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX35: Switch to common clkSascha Hauer2012-10-041-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX21: Switch to common clkSascha Hauer2012-10-041-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX6: Switch to common clkSascha Hauer2012-10-041-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX31: Switch to common clkSascha Hauer2012-10-041-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX1: Switch to common clk supportSascha Hauer2012-10-041-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX5: Switch to common clk supportSascha Hauer2012-10-041-2/+2
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX25: Switch to common clk supportSascha Hauer2012-10-041-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX27: implement clk supportSascha Hauer2012-10-041-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: initial clk supportSascha Hauer2012-10-041-0/+1
| | | | | | | This adds the basic i.MX common clk support and some pll and pfd drivers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/pbl'Sascha Hauer2012-09-051-0/+1
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| * ARM boards: Make boards pbl safeSascha Hauer2012-08-121-0/+1
| | | | | | | | | | | | | | | | With pbl support enabled most boards need a pbl-y for their lowlevel stuff. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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