| Commit message (Collapse) | Author | Age | Files | Lines |
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For all users fix or add the error check.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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- Make sure the LCDC ipg clock is turned off during startup
- register all LCDC clocks (ahb, ipg, per) and pass them to driver
This is necessary because the LCDC doesn't have an enable bit. It just
starts working once the clocks are turned on. If the registers have
invalid values at that time the controller goes into some error state.
So we have to make sure the clocks are turned off during startup and
only turned on in the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Only one GPT will be used, but with devicetree support we can't predict
which one it is, so we need the clock lookup for all GPTs to ensure
that the timer gets its clock.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This moves the CCM drivers to core_initcall since this has no dependencies.
This way we can be sure that the clock for the clocksource is available in
at postcore_initcall time.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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On the MX27 based board phycard-i.MX27 the display won't properly
come up.
Before removing imx-regs.h and the code that sets the register
in the i.MX video driver, the PCCR registers were set _after_
the screen start (LSSAR) was set.
This restores that old behaviour and makes the display come up
properly again.
I did not have a chance to test this on any other i.MX27 or i.MX21
hardware though I assume that the "old" order is required there
too.
Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Conflicts:
drivers/net/fec_imx.c
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This gate is used to enable/disable the lcd controller, hence we
need a gate for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds the compatible strings to the CCM drivers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This enables the following clocks on i.MX25:
PER: esdhc1, esdhc2, i2c, nfc, owire, pwm, uart
AHB: emi, esdhc1, esdhc2, fec, lcdc, usbotg
IPG: cspi1, cspi2, cspi3, esdhc1, esdhc2, fec, gpt1, gpt2, gpt3, gpt4,
iim, LCDC_EN, pwm1, pwm2, pwm3, pwm4, spba, tsc, uart1, uart2, uart3,
uart4, uart5
These are hopefully all the clocks we need for barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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