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* ARM i.MX: Add i.MX6SL supportAlexander Kurz2017-02-021-0/+3
| | | | | | | | | | | | | Most i.MX6SL infrastructure is already covered in barebox by general i.MX6 support. Missing infrastructure provided in separate commits are * SoC type detection * Clock infrastructure Add the missing fsl,imx6sl-mmdc, so it will not be catched by fsl,imx6q-mmdc and the remaining bits and pieces to provide barebox i.MX6SL SoC support. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6 esdctl: Add i.MX6ul supportSascha Hauer2016-11-081-0/+19
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: esdctl: Fix wrong driver nameSascha Hauer2016-04-131-2/+2
| | | | | | The driver should be named imx_esdctl_driver, not imx_serial_driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: esdctl: Fix memsize calculation for 4GiB/csSascha Hauer2016-04-011-3/+3
| | | | | | | On i.MX6 a single chipselect can have 4GiB, which overflows a 32bit type, so imx6_mmdc_sdram_size() must return a u64 to support this case. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* driver: replace dev_request_mem_region with dev_request_mem_resourceSascha Hauer2016-03-071-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_request_mem_region doesn't work properly one some SoCs on which PTR_ERR() values clash with valid return values from dev_request_mem_region. Replace them with dev_request_mem_resource where possible. This patch has been generated with the following semantic patch: // <smpl> @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { ... - return PTR_ERR(io); -} + return PTR_ERR(iores); +} +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) - return PTR_ERR(io); -} + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { - ret = PTR_ERR(io); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { + ret = PTR_ERR(iores); ... } +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ identifier func; @@ func(...) { <+... struct resource *iores; -struct resource *iores; ...+> } // </smpl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: Add i.MX6 entry functionSascha Hauer2015-07-161-0/+11
| | | | | | | | Add a i.MX6 specific entry function which automatically detects the SDRAM size. The prototype has already been present, but it was never implemented. Rename it to imx6q_ since the other variants need other functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* of: use 'const void *' for struct of_device_id.dataAntony Pavlov2015-04-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since 2011 barebox' of_device_id struct uses unsigned long type for data field: struct of_device_id { char *compatible; unsigned long data; }; Almost always struct of_device_id.data field are used as pointer and need 'unsigned long' casting. E.g. see 'git grep -A 4 of_device_id drivers/' output: drivers/ata/sata-imx.c:static __maybe_unused struct of_device_id imx_sata_dt_ids[] = { drivers/ata/sata-imx.c- { drivers/ata/sata-imx.c- .compatible = "fsl,imx6q-ahci", drivers/ata/sata-imx.c- .data = (unsigned long)&data_imx6, drivers/ata/sata-imx.c- }, { Here is of_device_id struct in linux kernel v4.0: struct of_device_id { char name[32]; char type[32]; char compatible[128]; const void *data; }; Changing of_device_id.data type to 'const void *data' will increase barebox' linux kernel compatibility and decrease number of 'unsigned long' casts. Part of the patch was done using the 'coccinelle' tool with the following semantic patch: @rule1@ identifier dev; identifier type; identifier func; @@ func(...) { <... - dev_get_drvdata(dev, (unsigned long *)&type) + dev_get_drvdata(dev, (const void **)&type) ...> } @rule2@ identifier dev; identifier type; identifier func; identifier data; @@ func(...) { <... - dev_get_drvdata(dev, (unsigned long *)&type->data) + dev_get_drvdata(dev, (const void **)&type->data) ...> } Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: remove __naked from imx*_barebox_entrySascha Hauer2015-03-091-7/+7
| | | | | | | | | Since the stack is already configured when entering imx*_barebox_entry we can remove the __naked attribute. This fixes some compilation issues when some of the imx*_barebox_entry got too complicated to compile without stack. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* sizes.h: move include/sizes.h to include/linux/sizes.hMasahiro Yamada2015-01-081-1/+1
| | | | | | | | | | | | | | This file originates in Linux. Linux has it under include/linux/ directory since commit dccd2304cc90. Let's move it to the same place as well in barebox. This commit was generated by the following commands: find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:' git mv include/sizes.h include/linux/ Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX6: esdctl: Fix a bug in memory probing codeAndrey Smirnov2014-11-201-2/+21
| | | | | | | | | | | Old version of imx6_mmdc_add_mem did not use 64-bit arithmetic and thus was prone to overflow on systems with 4GB of memory. It also did not take into account the fact that i.MX6 does not support more than 3.8GB of memory and would report incorrect memory size. This commit fixes both issues. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* resource: Let dev_request_mem_region return an error pointerSascha Hauer2014-09-161-2/+3
| | | | | | For all users fix or add the error check. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: esdctl: i.MX53 has esdctl v4, not v3Sascha Hauer2014-07-181-2/+2
| | | | | | | | On the i.MX53 this has the effect that in early init only half of the memory bank is detected and the barebox image is place in the middle of SDRAM. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: move malloc area to upper memory bank by defaultLucas Stach2014-05-051-49/+66
| | | | | | | | | | If we have two discontinuous memory banks we want to move the malloc area into the upper bank by default to leave as much free space in the lower bank, where we have to place kernel, oftree and initrd. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: change signature of barebox_arm_entryLucas Stach2014-05-051-7/+7
| | | | | | | | | | | Mostly to make it clear that boarddata needs to be something we can dereference. As this is a pretty invasive change, use the opportunity to make the signature 64bit safe. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imx6: read back memory sizeChristian Hemp2014-04-281-0/+64
| | | | | | | | To reduce the devicetree files for one board with different memory sizes the memory size can be read back from i.MX6. Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: esdctl: Use __iomem specifier for memory pointerAlexander Shiyan2014-01-291-1/+1
| | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: Add missing includesSascha Hauer2013-11-081-0/+1
| | | | | | | | A lot of files rely on include/driver.h including include/of.h (and this including include/errno.h. include the files explicitly so we can eventually get rid of including of.h from driver.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Allow disabling SDRAM autodetectionSascha Hauer2013-05-081-0/+14
| | | | | | | Some boards setup more memory than they actually have. The real memory size can then be detected later for example by reading a board id. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX ESDCTL: Fix default enabled esdctl v2 controllerSascha Hauer2013-03-261-15/+28
| | | | | | | | | | | On some i.MX SoCs the SDRAM controller has chipselect 2 enabled by reset default. This confuses our SDRAM size detection. We already have a fix for this in place. This patch adds the fix for i.MX35 which needs it aswell. Also since we now detect the SDRAM size in the SoC specific entry functions we have to apply the fixup there, too. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Replace numbers with predefined constants in several placesAlexander Shiyan2013-02-261-1/+1
| | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add i.MX specific entry point for bareboxSascha Hauer2013-02-041-21/+115
| | | | | | | | Additionally to the generic entry point the i.MX specific ones calculate the SDRAM size automatically so the boards do not have to care. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: fix format specifiersSascha Hauer2013-01-271-2/+2
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* esdctl: fix reset default bug on i.MX27/31Sascha Hauer2012-12-121-2/+23
| | | | | | | | | | The i.MX27/31 have the second chip select enabled by reset default. This can be considered as a hardware bug, because even boards which need this settings cannot work out of reset because of the missing initialization sequence. Detect this reset default setting and disable this chipselect then to be able to properly detect the SDRAM size. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX esdctl: Use defines from exisiting header fileSascha Hauer2012-12-061-18/+8
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add driver to get sdram base and sizeSascha Hauer2012-12-061-0/+344
The code initializing the SDRAM controller is not at the same place where SDRAM is registered with barebox. To reduce the risk of registering wrong SDRAM sizes this patch adds a driver for the ESDCTL which reads back the configured SDRAM size and registers the memory found with barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-26 14:05:59 +0000