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* ARM: i.MX6 esdctl: Add i.MX6ul supportSascha Hauer2016-11-081-0/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: Add i.MX6 entry functionSascha Hauer2015-07-161-1/+1
| | | | | | | | Add a i.MX6 specific entry function which automatically detects the SDRAM size. The prototype has already been present, but it was never implemented. Rename it to imx6q_ since the other variants need other functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: remove __naked from imx*_barebox_entrySascha Hauer2015-03-091-8/+8
| | | | | | | | | Since the stack is already configured when entering imx*_barebox_entry we can remove the __naked attribute. This fixes some compilation issues when some of the imx*_barebox_entry got too complicated to compile without stack. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: change signature of barebox_arm_entryLucas Stach2014-05-051-8/+8
| | | | | | | | | | | Mostly to make it clear that boarddata needs to be something we can dereference. As this is a pretty invasive change, use the opportunity to make the signature 64bit safe. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Allow disabling SDRAM autodetectionSascha Hauer2013-05-081-0/+1
| | | | | | | Some boards setup more memory than they actually have. The real memory size can then be detected later for example by reading a board id. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add i.MX specific entry point for bareboxSascha Hauer2013-02-041-0/+11
| | | | | | | | Additionally to the generic entry point the i.MX specific ones calculate the SDRAM size automatically so the boards do not have to care. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add driver to get sdram base and sizeSascha Hauer2012-12-061-0/+1
| | | | | | | | | | The code initializing the SDRAM controller is not at the same place where SDRAM is registered with barebox. To reduce the risk of registering wrong SDRAM sizes this patch adds a driver for the ESDCTL which reads back the configured SDRAM size and registers the memory found with barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX esdctl.h: Add double include protectionSascha Hauer2012-11-271-0/+3
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Use SoC specific base to access sdram controller registersSascha Hauer2012-10-171-5/+5
| | | | | | | | This redefines the sdram controller registers as offsets to the base rather than as absolute addresses. All users are fixed to use the SoC specific base address. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX esdctl: Add some missing bitfieldsSascha Hauer2011-03-031-0/+4
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX esdctl: Add register bits from redbootSascha Hauer2010-10-221-0/+88
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: remove __REG from esd controller regs. use readl/writel insteadSascha Hauer2010-05-031-5/+5
| | | | | | | So far these registers are unused in C, so we can remove the __REG without harm. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machJean-Christophe PLAGNIOL-VILLARD2009-10-221-0/+34
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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