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* ARM i.MX: add SoC type detection for i.MX6SLAlexander Kurz2017-02-011-1/+18
| | | | | | | | | | | | | | | | | | | | The i.MX6 series SoC type is determined by barebox by examining the USB_ANALOG_DIGPROG aka IMX6_ANATOP_SI_REV register. This register is located at a common offset for all mx6 SoC - except for i.MX6SL where a different offset is used. This creates a dilemma while distinguishing the mx6sl from non-mx6sl SOC since the SoC type identification register location is type specific itself. Access to undocumented and probably invalid or unpredictable registers should be avoided as possible. For the mx6sl detection an access to the general USB_ANALOG_DIGPROG @0x260 cannot be avoided when running on mx6sl. This register contained the value 0x00014009 for different mx6sl Rev. 1.2 based e-book readers using MCIMX6L7DVN10AB and MCIMX6L8DVN10AB SoC. This implementation assumes the value of MAJOR_UPPER (here 0x01) to be smaller than the smallest non-6sl MAJOR_UPPER (0x61 for mx6s). Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: move cpu_type macros in front of cpu_revision codeAlexander Kurz2017-02-011-20/+20
| | | | | | | Preparational commit to enable the use of cpu_type macros in imx6_cpu_revision() Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx'Sascha Hauer2016-11-141-0/+2
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| * ARM: i.MX: beginning i.MX6ul supportSascha Hauer2016-11-081-0/+2
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i.MX: Introduce imx6_cpu_revision()Andrey Smirnov2016-10-041-0/+36
|/ | | | | | | | | Factor out CPU revision identification code from imx6_init() into a standalone inline function (similar to imx6_cpu_type()), so that it would be possible to use that functionality in PBL code. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: add function cpu_is_mx6s()Stefan Christ2016-02-171-0/+1
| | | | | | | | The cpu_is_mx6* function for the i.MX6 Solo was missing. All other functions are already defined. Signed-off-by: Stefan Christ <s.christ@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: create cpu_is() functions for use in PBLSascha Hauer2015-07-161-24/+17
| | | | | | | | | | The current cpu_is_mx6x() functions need the imx6_cpu_type variable which make them unsuitable for PBL. Add a set of cpu_mx6_is_mx6x() functions which can be called from PBL aswell. Unlike the cpu_is_mx6x() functions the cpu_mx6_is_mx6x() functions assume that they are called on i.MX6 only. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add i.MX6sx supportSascha Hauer2014-11-271-0/+6
| | | | | | | | Add some cpu type defines and clock support. The clock support is very different from other i.MX variants, so it's a separate file, like done in the kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add correct SoC type detection for i.MX6Sascha Hauer2014-01-141-8/+41
| | | | | | | | Using the ANATOP_SI_REV register we can only distinguish between i.MX6q/d and i.MX6dl/s SoCs. Take the number of cores into account to get the exact SoC type. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: Add cputype detectionSascha Hauer2013-06-251-0/+31
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add initial i.MX6 supportSascha Hauer2012-04-241-0/+6
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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