barebox - barebox master repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	ARM: i.MX8M: Add base addresses common to i.MX8M	Sascha Hauer	2020-02-19	1	-0/+2
\| \| \| \| \| \| \| \| \| \|	This adds defines for the base addresses common to all currently existing i.MX8M SoCs. Only the base addresses that are known to be needed for the early SoC code are added. With this we can reuse the early code for all variants without guessing that the base addresses are the same for the other variants. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	ARM: i.MX8: Add DDRC PHY and DDR CTL base addresses	Andrey Smirnov	2018-06-11	1	-1/+3
\| \| \| \| \|	Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	ARM: Add i.MX8 support	Sascha Hauer	2018-06-08	1	-0/+121
	Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [andrew.smirnov@gmail.com: fix B0 chips to report IMX_CHIP_REV_2_0] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>