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* ARM: mvebu: add support for Netgear RN2120Uwe Kleine-König2016-10-071-0/+4
| | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add initial support for Netgear ReadyNAS 104Uwe Kleine-König2016-01-221-0/+4
| | | | | | | | | | | | | | | Currently only second stage booting from the vendor U-Boot is tested. I don't want to flash barebox into NAND yet because UART-booting for recovery doesn't work for me. Working so far are: - UART - networking - nand flash Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* restart: replace reset_cpu with registered restart handlersSascha Hauer2015-08-275-26/+15
| | | | | | | | | | | | | | | | | | | | | | This replaces the reset_cpu() function which every SoC or board must provide with registered handlers. This makes it possible to have multiple reset functions for boards which have multiple ways to reset the machine. Also boards which have no way at all to reset the machine no longer have to provide a dummy reset_cpu() function. The problem this solves is that some machines have external PMICs or similar to reset the system which have to be preferred over the internal SoC reset, because the PMIC can reset not only the SoC but also the external devices. To pick the right way to reset a machine each handler has a priority. The default priority is 100 and all currently existing restart handlers are registered with this priority. of_get_restart_priority() allows to retrieve the priority from the device tree which makes it possible for boards to give certain restart handlers a higher priority in order to use this one instead of the default one. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: armada-xp: Add Lenovo Iomega ix4-300dSebastian Hesselbarth2015-04-271-0/+4
| | | | | | | | This adds support for Marvell Armada XP based 4-bay NAS Lenovo Iomega ix4-300d. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: armada-xp: Sort boards and images alphabeticallySebastian Hesselbarth2015-04-271-4/+4
| | | | | | | | Before adding new Armada XP based boards becomes messier than necessary, sort Armada XP based board Kconfig and image Makefile alphabetically. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: armada-xp: Use MBUS_ERR_PROP_EN defineSebastian Hesselbarth2015-04-271-3/+3
| | | | | | | | With proper defines for ARMADA_370_XP_FABRIC_CTRL and MBUS_ERR_PROP_EN make use of it. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: armada-xp: Limit PUP access to Armada XPSebastian Hesselbarth2015-04-272-6/+15
| | | | | | | | | | | | | | Commit 6638760c225c37f90e822ebf4dd8f0d2cd0b0ef3 ("ARM: mvebu: Enable PUP register") correctly enables devices that are disabled after boot-up due to some Design For Testability registers. However, although harmless on Armada 370, call the code conditionally on Armada XP only. While at it, move PUP register defines to SYSCTL registers where they belong to. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: armada-xp: Fixup broken MV78230-A0 SoC IDSebastian Hesselbarth2015-04-272-4/+86
| | | | | | | | | Marvell Armada XP MV78230-A0 incorrectly identifies itself as MV78460. Check number of CPUs in FABRIC_CONF and fixup PCIe DEV_ID when it is 2 CPUs instead of 4. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: Move PCIe register defines to socid.hSebastian Hesselbarth2015-04-272-4/+5
| | | | | | | | To prepare PCIe device id fixups, move PCIe register defines to a common location. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* bus: mvebu-mbus: Convert mbus platform driver to direct driverSebastian Hesselbarth2015-04-273-0/+3
| | | | | | | | | | Registering mbus driver as platform driver is a little late for some register accesses to work. We have to make sure boot-up mbus windows are disabled early, so call mbus driver directly from SoC init. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* sizes.h: move include/sizes.h to include/linux/sizes.hMasahiro Yamada2015-01-081-1/+1
| | | | | | | | | | | | | | This file originates in Linux. Linux has it under include/linux/ directory since commit dccd2304cc90. Let's move it to the same place as well in barebox. This commit was generated by the following commands: find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:' git mv include/sizes.h include/linux/ Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: Enable PUP registerEzequiel Garcia2014-11-112-0/+12
| | | | | | | | | | | | | | As reported by Sebastian, we need to enable this explicitly for the Tx clock on RGMII. While here, let's enable all the other peripherals. Although this is documented to be required only for Armada XP SoC, it has been found to be harmless on Armada 370, so we do it unconditionally to simplify the code. Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2014-10-021-4/+0
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| * pinctrl: fix Kconfig dependenciesSascha Hauer2014-09-151-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Remove OFDEVICE dependency from PINCTRL. It won't do much then, so add a comment to Kconfig when PINCTRL is selected without OFDEVICE - Let Architectures only select PINCTRL instead of the particular driver. Change the drivers to 'default y if $SOC' to make sure the drivers are still compiled if the corresponding SoC is selected This fixes Kconfig warnings like: warning: (PINCTRL_ARMADA_370 && PINCTRL_ARMADA_XP && PINCTRL_DOVE && PINCTRL_KIRKWOOD) selects PINCTRL which has unmet direct dependencies (OFDEVICE) Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | ARM: mvebu: Allow multiple SoCsSascha Hauer2014-09-231-21/+15
| | | | | | | | | | | | | | | | Now that the correct SoC specific memory fixup function is called we can allow to select multiple SoCs in Kconfig. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | ARM: mvebu: Check for correct SoC in of_fixup callbackSascha Hauer2014-09-193-0/+9
| | | | | | | | | | | | | | | | Only run the fixup when we are actually on the corresponding SoC. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* | ARM: mvebu: Simplify memory init orderSascha Hauer2014-09-195-37/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The initialisation of the memory nodes on mvebu is a bit compilcated: pure_initcall(mvebu_memory_fixup_register) of_register_fixup(mvebu_memory_of_fixup, NULL) core_initcall(kirkwood_init_soc) mvebu_set_memory() core_initcall(of_arm_init) of_fix_tree() mvebu_memory_of_fixup() First a mvebu common of_fixup function is registered, then the SoC calls mvebu_set_memory which stores the memory base and size in global variables. Afterwards the of_fixup is executed which fixes the memory nodes according to the global variables. Instead register a SoC specific fixup which directly calls mvebu_set_memory with the memory base and size as arguments: pure_initcall(kirkwood_register_soc_fixup); of_register_fixup(kirkwood_init_soc, NULL); core_initcall(of_arm_init) of_fix_tree() kirkwood_init_soc() mvebu_set_memory(phys_base, phys_size); Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mvebu: Add machine compatible to mbus rangesSebastian Hesselbarth2014-09-193-4/+8
| | | | | | | | | | | | | | | | | | | | Multi-SoC support for MVEBU will add mbus ranges for all compiled SoCs. To protect the mbus node of the SoC barebox is executed on from others ranges, pass machine's compatible to mvebu_mbus_add_range and check before applying the fixup. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mvebu: Add common reset_cpu functionSascha Hauer2014-09-195-28/+46
|/ | | | | | | | | mvebu has a reset_cpu function per SoC this does not work when multiple SoCs are selected, so add a common reset_cpu function which calls into the SoC specific ones. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: mvebu: Add Plat'home's Kirkwood Openblocks A6 board supportEzequiel Garcia2014-09-011-0/+3
| | | | | | | | | This commit adds a new Marvell Kirkwood-based board, by following the currently supported boards. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: armada-370-xp: disable MBUS error propagationSebastian Hesselbarth2014-07-312-0/+8
| | | | | | | | | | Accessing MBUS windows not backed-up by e.g. PCIe devices will hang the SoC. Disable MBUS error propagation back to CPU allows to read 0xffffffff instead of hanging the SoC. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: add fixup for directly attached memorySebastian Hesselbarth2014-07-255-3/+64
| | | | | | | | | | | | On Marvell MVEBU SoCs memory size is set up by BootROM and can be read from SoC's RAM controller. With early DT fixups available, set corresponding DT node to reflect accessible amount of directly attached RAM. This patch also removes non-DT call to arm_add_mem_device to silence a warning about request_region conflict due to adding a mem device twice. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: add register remap for mbus idsSebastian Hesselbarth2014-07-253-0/+10
| | | | | | | | For each supported MVEBU SoC, add the corresponding remapped registers to fix them up in provided DTBs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: mvebu: add pinctrl driver for Armada XPSebastian Hesselbarth2014-07-231-0/+1
| | | | | | | | | This adds a pinctrl driver for pin muxing on Marvell Armada XP. The driver is ported from Linux and modified to fit on Barebox's common mvebu pinctrl driver. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: mvebu: add pinctrl driver for Armada 370Sebastian Hesselbarth2014-07-231-0/+1
| | | | | | | | | This adds a pinctrl driver for pin muxing on Marvell Armada 370. The driver is ported from Linux and modified to fit on Barebox's common mvebu pinctrl driver. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: mvebu: add pinctrl drivers for Dove and KirkwoodSebastian Hesselbarth2014-06-261-0/+2
| | | | | | | | | | This adds pinctrl drivers for Marvell Dove and Kirkwood SoCs based on a common driver stub. This design is based on the corresponding Linux driver and should ease additional drivers for Marvell Armada SoCs. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: determine SoC id and revision from PCIe nodesSebastian Hesselbarth2014-06-252-0/+140
| | | | | | | | | Marvell MVEBU SoC id and revision can be read out from any PCIe port registers. This adds corresponding code to read out id and revision and provides a helper function for drivers to use it. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: convert to multiple board selectionSebastian Hesselbarth2014-06-241-21/+0
| | | | | | | | With all SoCs converted to DT based probing, select PBL_MULTI_IMAGES support and get rid of SoCs Kconfig choice to allow multiple boards to be selected. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: mvebu: convert Armada 370/XP devices to be probed from DTSebastian Hesselbarth2014-06-241-65/+1
| | | | | | | | With Armada 370/XP DT files available, convert Armada 370/XP SoC init to register basic devices from DT only. Makefile targets for dtbs will be removed again as soon as MULTI_PBL is available. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: mvebu: convert Kirkwood devices to be probed from DTSebastian Hesselbarth2014-06-241-46/+0
| | | | | | | | With Kirkwood DT files available, convert Kirkwood SoC init to register basic devices from DT only. Makefile targets for dtbs will be removed again as soon as MULTI_PBL is available. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: mvebu: add 25MHz fixed clock for Armada XPSebastian Hesselbarth2014-06-241-0/+5
| | | | | | | Armada XP timers can be run from a 25MHz fixed clock. Add the corrsponding clock and clock alias to SoC setup. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: mvebu: move lowlevel code to lowlevel.cSebastian Hesselbarth2014-06-243-41/+38
| | | | | | | | mach-mvebu has two files containing lowlevel code. Consolidate both into mach-mvebu/lowlevel.c. Also put the now empty mach-mvebu/common.c into non-lowlevel obj-y as it will be used for common non-lowlevel code later. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: mvebu: delete unused mach/mvebu.hSebastian Hesselbarth2014-06-241-22/+0
| | | | | | This removes the stale mach/mvebu.h include as there is no user of it. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: mvebu: set default TEXT_BASE by SoCSebastian Hesselbarth2014-06-241-6/+4
| | | | | | | All current boards use the same TEXT_BASE, therefore set the default TEXT_BASE by SoC instead of by board. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: mvebu: set model and default hostname for DoveSebastian Hesselbarth2014-06-241-0/+3
| | | | | | Set default model and hostname based on SoC name. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* ARM: change signature of barebox_arm_entryLucas Stach2014-05-053-3/+3
| | | | | | | | | | | Mostly to make it clear that boarddata needs to be something we can dereference. As this is a pretty invasive change, use the opportunity to make the signature 64bit safe. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* x86: ns16550: Rework driver to allow for x86 I/O spaceMichel Stam2014-04-092-2/+4
| | | | | | | | | | | | The current implementation fakes a memory-mapped I/O device at 0x3f8 and 0x2f8, then uses platform read/write functions to do the actual reading and writing. These platform functions only exist for the x86 platform; better to move the I/O routines into the driver and have the driver request I/O ports using request_ioport_region. Signed-off-by: Michel Stam <michel@reverze.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/boardinfo'Sascha Hauer2013-09-053-8/+6
|\ | | | | | | | | | | | | Conflicts: arch/mips/boards/qemu-malta/init.c commands/bootm.c drivers/of/base.c
| * Set model and hostname at boardlevelSascha Hauer2013-08-163-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | With multiboard support the compiletime generated BOARDINFO string gets more and more meaningless. This removes it from Kconfig and replaces it with a variable that can be set at boardlevel. Also many boards have a standard setting for the hostname in the environment. This patch also moves the standard to C code by calling barebox_set_hostname(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/arm-gpio'Sascha Hauer2013-09-051-6/+0
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| * | ARM: remove include of mach/gpio.h for gpiolib usersSascha Hauer2013-08-161-6/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | gpiolib user have nothing to define in their machine specific gpio.h, so do not include it. The only thing they could define would be ARCH_NR_GPIOS, but currently no architecture defines it. Should an architecure feel the need to do it this would be a good opportunity to get rid of this limitation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: mvebu: introduce multi image supportSascha Hauer2013-08-165-5/+6
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: dove: remove temporary clock and non-DT device probingSebastian Hesselbarth2013-08-161-58/+0
|/ | | | | | | | With OF clock providers, we can now remove temporary clocks and clock aliases. Also, non-DT device probing for timer and serial is removed. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Cleanup Kconfig filesAlexander Shiyan2013-08-121-1/+1
| | | | | | | | | This patch provides a global cleanup barebox Kconfig files. This includes replacing spaces to tabs, formatting in accordance format. No functional changes. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: mvebu: add board USI TopkickJason Cooper2013-07-221-0/+5
| | | | | | | Successfully boots to console via kwboot. No other functionality yet. Signed-off-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: add clock aliases for spi0/spi1 on DoveSebastian Hesselbarth2013-07-092-0/+5
| | | | | | | | This adds clock aliases for spi controllers found on Dove to allow spi driver to get tclk frequency. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* GPIO: add Marvell Orion/MVEBU SoC GPIO driverSebastian Hesselbarth2013-07-051-0/+6
| | | | | | | | This adds a DT only driver for the GPIO controller found on Marvell Orion/MVEBU SoCs (Armada 370/XP, Dove, Kirkwood, MV78x00, Orion5x). Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clocksource: mvebu: lookup clock by physbaseSebastian Hesselbarth2013-07-051-1/+2
| | | | | | | | This converts Armada 370/XP SoC init to register tclk alias for timer by physbase instead of name. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clocksource: orion: lookup clock by physbaseSebastian Hesselbarth2013-07-052-2/+4
| | | | | | | | This converts Kirkwood and Dove SoC init to register tclk alias for timer by physbase instead of name. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mvebu: move soc_init to core_initcallSebastian Hesselbarth2013-07-053-3/+3
| | | | | | | | Clocks need to be accessed early for DT support, so move soc_init to core_initcall instead of postcore_initcall. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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