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* ARM: socfpga: add support for reflex achilles boardSteffen Trumtrar2017-05-041-0/+5
| | | | | Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: add arria10 supportSteffen Trumtrar2017-05-031-0/+19
| | | | | | | | | | | | | | | | | | Arria10 is a SoC + FPGA like the Cyclone5 SoCFPGA that is already supported in barebox. Both a the same in some parts, but totaly different in others. Most of the hardware blocks are the same in the SoC parts. The OCRAM is larger on the Arria10 and the SDRAM controller is different. The serial core only supports 32bit accesses (different to the 8bit accesses on the Cyclone5). As Arria10 has 256KB of OCRAM, it is possible to fit a larger barebox (and/or use PBL) instead of the two stage bootprocess used on the Cyclone5 and its 64KB OCRAM. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Make generic default environment type a use choiceSascha Hauer2016-10-101-4/+0
| | | | | | | | So far it was hardcoded for each board if defenv-1 or defenv-2 is used. Make this a user choice so that a particular board no longer enforces a defenv type. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Terasic DE0-Nano-SoC: add supportTim Sander2016-03-011-0/+4
| | | | | | | | | | | | v7: eof whitespace fixes A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign Signed-off-by: Tim Sander <tim@krieglstein.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: add default ARCH_TEXT_BASELucas Stach2015-06-261-0/+4
| | | | | | | | | | | | As SoCFPGA is multi-image enabled there is no real reason to bother the user with asking for the text base. Fixes a bunch of randcfg failures. Regenerate defconfig to drop the explicit config there, which unfortunately introduces quite a bit of churn. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: socfpga: add Altera SoCFPGA Development Kit supportSteffen Trumtrar2015-03-021-0/+4
| | | | | | | | Add support for the Altera SoCFPGA Development Kit. The setup is based on the GHRD from Altera. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: SoCFPGA: Add EBV SoCrates board supportSascha Hauer2013-09-231-0/+4
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: SoCFPGA: Add Terasic SoCkit board supportSascha Hauer2013-09-231-0/+4
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add Altera SoCFPGA supportSascha Hauer2013-09-231-0/+11
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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