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* treewide: Reuse init_clock() return value for clocksource driversAlexander Shiyan2014-11-101-2/+1
* tegra: remove custom UART setupLucas Stach2014-11-043-119/+0
* tegra: pmc: add support for reset src detectionLucas Stach2014-11-042-0/+41
* tegra: jetson-tk1: enable 1.05V_RUNLucas Stach2014-11-041-0/+2
* tegra: pmc: work around power domain failureLucas Stach2014-11-031-0/+2
* tegra: pmc: add powerdomain handlingLucas Stach2014-10-082-3/+229
* clk: tegra30: add PCIe clocksLucas Stach2014-10-081-0/+2
* clk: tegra: add PLLE setup functionsLucas Stach2014-10-081-0/+2
* Merge branch 'for-next/resource-err-ptr'Sascha Hauer2014-10-022-4/+6
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| * resource: Let dev_request_mem_region return an error pointerSascha Hauer2014-09-162-4/+6
* | pinctrl: fix Kconfig dependenciesSascha Hauer2014-09-151-3/+0
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* arm: tegra: enable ARM errata workaroundsLucas Stach2014-06-261-2/+19
* tegra: add NVIDIA Jetson-TK1 board supportLucas Stach2014-06-051-0/+4
* tegra: pmc: add Tegra124 compatibleLucas Stach2014-06-051-0/+2
* pinctrl: tegra: add Tegra124 supportLucas Stach2014-06-051-0/+1
* tegra: add Tegra124 Kconfig symbolLucas Stach2014-06-051-0/+3
* tegra: add architectural timer initLucas Stach2014-06-053-0/+58
* tegra: setup L2 cache on Tegra124Lucas Stach2014-06-051-1/+12
* tegra: hardcode entry address for main clusterLucas Stach2014-06-051-2/+16
* tegra: apply cluster switch logic to all SoCs >=T30Lucas Stach2014-06-051-1/+1
* tegra: add Tegra124 PLL_X rate setupLucas Stach2014-06-051-0/+8
* tegra: change cpu internal reset layout for Tegra124Lucas Stach2014-06-051-4/+15
* tegra: fix MESLECT clock enableLucas Stach2014-06-052-1/+3
* tegra: power up additional partitions on Tegra124Lucas Stach2014-06-052-6/+22
* tegra: disable IDDQ for PLL_X on Tegra124Lucas Stach2014-06-052-0/+28
* tegra: add Tegra124 and AS3722 PMIC to lowlevel-dvcLucas Stach2014-06-051-0/+55
* tegra: recognize Tegra124 in common initcallsLucas Stach2014-06-051-2/+4
* tegra: recognize Tegra124 in maincomplex startupLucas Stach2014-06-051-0/+1
* tegra: lowlevel: fix ODMdata fetch on Tegra124Lucas Stach2014-06-051-15/+35
* tegra: add Tegra124 id to lowlevel functionsLucas Stach2014-06-051-0/+6
* tegra: lowlevel: setup an early stackLucas Stach2014-06-051-0/+2
* tegra: pmc: add command to get into RCMLucas Stach2014-06-051-0/+20
* tegra: pmc: add Tegra30 compatibleLucas Stach2014-06-041-0/+2
* tegra: lowlevel-dvc: use __always_inline macroLucas Stach2014-06-041-3/+3
* ARM: tegra: beaver: activate sdmmc1 voltage railLucas Stach2014-05-151-0/+2
* clk: tegra30: register i2c clocksLucas Stach2014-05-151-0/+2
* tegra: lowlevel: add function to fetch chipidLucas Stach2014-05-151-0/+6
* ARM: tegra30: ramp vdd_core to 1,2VLucas Stach2014-05-081-0/+18
* ARM: tegra30: slow down CPU to 600 MHzLucas Stach2014-05-081-4/+4
* ARM: change signature of barebox_arm_entryLucas Stach2014-05-051-1/+1
* Merge branch 'for-next/tegra'Sascha Hauer2014-05-056-9/+82
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| * ARM: tegra: add NVidia Beaver board supportLucas Stach2014-04-231-0/+4
| * pinctrl: tegra: add Tegra3 driverLucas Stach2014-04-231-0/+1
| * tegra: recognize T30 in debug UART codeLucas Stach2014-04-232-3/+21
| * tegra: add Tegra3 mem initcallLucas Stach2014-04-231-1/+15
| * tegra: add Tegra3 ramsize detectionLucas Stach2014-04-232-1/+26
| * tegra: add Tegra3 kconfig symbolLucas Stach2014-04-231-0/+3
| * tegra: source MSELECT clock from CLK_MLucas Stach2014-04-231-2/+2
| * tegra: disable more lowlevel unsafe switch optimizationsLucas Stach2014-04-231-2/+10
* | x86: ns16550: Rework driver to allow for x86 I/O spaceMichel Stam2014-04-091-1/+1
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