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* treewide: add MODULE_DEVICE_TABLE markersAhmad Fatoum2023-06-132-0/+2
| | | | | | | | | | | | | | | | Syncing device trees with Linux upstream can lead to breakage, when the device trees are switched to newer bindings, which are not yet supported in barebox. To make it easier to spot such issues, we want to start applying some heuristics to flag possibly problematic DT changes. One step towards being able to do that is to know what nodes barebox actually consumes. Most of the nodes have a compatible entry, which is matched by an array of of_device_id, so let's have MODULE_DEVICE_TABLE point at it for future extraction. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230612125908.1087340-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tegra: Move mach header files to include/mach/tegraSascha Hauer2023-03-0618-1377/+17
| | | | | | | | | | Currently arch specific headers can be included with longer possible as there won't be a single mach anymore. Move all tegra specific header files to include/mach/tegra/ to prepare for multi-arch support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename struct driver_d to driverSascha Hauer2023-01-102-2/+2
| | | | | | | | | | | The '_d' suffix was originally meant to distinguish barebox struct names from Linux struct names. struct driver doesn't exist in Linux, so we can rename it and remove the meaningless suffix. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename struct device_d to deviceSascha Hauer2023-01-102-2/+2
| | | | | | | | | | | | | The '_d' suffix was originally introduced in case we want to import Linux struct device as a separate struct into barebox. Over time it became clear that this won't happen, instead barebox struct device_d is basically the same as Linux struct device. Rename the struct name accordingly to make porting Linux code easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clocksource: assign non-zero priorities to all clocksourcesAhmad Fatoum2022-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most barebox clocksources have a zero priority and if multiple of them exist, but no higher priority ones, the first to call init_clock wins. Some supported boards like the Raspberry Pi additionally depended on initcall ordering to favor one zero-priority clocksource over another. With the move to deep probe and with Commit b641580deb8c ("of: platform: Ensure timers are probed early"), device tree blob iteration order could now dictate which clocksource is ultimately used. This led to a 20 times slower clock source being chosen on the Raspberry Pi, because the ARM architected timer was taken instead of the bcm2835 timer. Fix the root cause by assigning priorities to all clocksource drivers. Priorities chosen are: 50: device_initcall 60: coredevice_initcall 70: postcore_initcall 80: core_initcall These priorities are all below 100, which was previously the lowest positive priority and as they are positive, they win against the dummy clocksource. This should ensure no priority inversion happens. Fixes: b641580deb8c ("of: platform: Ensure timers are probed early") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220425094857.674044-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: add SPDX-License-Identifier for Kbuild/KconfigAhmad Fatoum2022-01-052-0/+4
| | | | | | | | | | | | | | | To verify only Kconfig/Makefile is touched: git show --numstat --format=oneline HEAD | grep -v 'Kconfig\|Makefile' will print only arch/powerpc/Kbuild. To verify nothing unexpected is added: git show -U0 | grep '^-[^-]\|^+[^+]' | sort -u Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220103120539.1730644-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: Use driver macroSascha Hauer2020-09-291-5/+1
| | | | | | | We have several macros for a oneline driver registration. Add some missing and use them consistently where possible througout the tree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* restart: give all restart handlers a descriptive nameAhmad Fatoum2020-09-151-1/+1
| | | | | | | | | | | | | With incoming changes to choose a specific reset method, give all currently unnamed "default" reset handlers a name: - soc reset via SoC-specific means - soc-wdt reset via SoC watchdog timer - vector reset via jump to reset vector - efi reset via EFI firmware Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* kbuild: rename pbl object pbl-*.o to *.pbl.oMasahiro Yamada2020-05-201-1/+1
| | | | | | | | | | | | | | | | | | Currently, pbl objects are output to: <directory-path>/pbl-<basename>.o This commit changes as follows: <directory-path>/<basename>.pbl.o The motivation is not only to get rid of the ugly code introduced by commit 257abdaa36c8 ("Do not rm the path from pbl-y target"), but also to make it easier to remove obj-dtb-y, pbl-dtb-y, lwl-dtb-y syntax in the next commit. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2020-05-141-1/+0
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| * treewide: remove references to CREDITSUwe Kleine-König2020-04-271-1/+0
| | | | | | | | | | | | | | | | The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97 ("Remove the CREDITS file"). Remove references to it from several files. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | treewide: Kconfig: remove some unused symbolsAhmad Fatoum2020-04-291-3/+0
|/ | | | | | | | All these symbols are defined, but unused anywhere in the barebox tree. Remove them. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Compile with -fPIESascha Hauer2019-11-121-10/+2
| | | | | | | | | | | | | | | | Early code in barebox often runs at an address the binary is not linked at. This causes problems for example when simple initializations in a switch are converted to an array lookup (-ftree-switch-conversion). These arrays are then addressed where they are linked at. Some code where this is known to cause problems is already compiled with -fno-tree-switch-conversion. This however is limited to single files. This patch compiles barebox with -fPIE enabled. This causes such tables to be looked up PC relative rather than with its absolute address. This makes the -fno-tree-switch-conversion and -fno-jump-table options unnecessary. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Cleanup stack offset cargo cultSascha Hauer2019-09-091-1/+1
| | | | | | | | | Most callers of arm_setup_stack substract a fixed offset of 8, 12 or 16 bytes from the stack top. This is unnecessary as on ARM we have a stack that decrements before storing values. Substracting this offset probably goes back to the U-Boot version we forked from. Stop this now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: return positive offset in get_runtime_offset()Sascha Hauer2018-03-212-2/+2
| | | | | | | | | | | When we are linked at 0x0 and running at 0x01000000 then get_runtime_offset() should return 0x01000000 and not 0xff000000. This makes get_runtime_offset() more consistent and better understandable. This was tested on a Freescale i.MX53 Quickstart board. Additionally relocate_to_adr() was tested since that is normally not called. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* include: Move ns16550 serial platform_data to include/platform_dataSascha Hauer2016-04-151-1/+0
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tegra: set up stack before calling maincluster entryLucas Stach2016-04-141-3/+4
| | | | | | | | Allows this code to work correct regardless of the used compiler optimizations. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* driver: replace dev_request_mem_region with dev_request_mem_resourceSascha Hauer2016-03-072-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_request_mem_region doesn't work properly one some SoCs on which PTR_ERR() values clash with valid return values from dev_request_mem_region. Replace them with dev_request_mem_resource where possible. This patch has been generated with the following semantic patch: // <smpl> @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { ... - return PTR_ERR(io); -} + return PTR_ERR(iores); +} +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) - return PTR_ERR(io); -} + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { - ret = PTR_ERR(io); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { + ret = PTR_ERR(iores); ... } +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ identifier func; @@ func(...) { <+... struct resource *iores; -struct resource *iores; ...+> } // </smpl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tegra: clean up lowlevel entryLucas Stach2016-01-183-11/+8
| | | | | | | | | | The lowlevel startup function jumps directly to the main cluster if we are already running there. This allows for a significant cleanup of the board startup code by directly using the FDT address available there. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* restart: replace reset_cpu with registered restart handlersSascha Hauer2015-08-271-4/+5
| | | | | | | | | | | | | | | | | | | | | | This replaces the reset_cpu() function which every SoC or board must provide with registered handlers. This makes it possible to have multiple reset functions for boards which have multiple ways to reset the machine. Also boards which have no way at all to reset the machine no longer have to provide a dummy reset_cpu() function. The problem this solves is that some machines have external PMICs or similar to reset the system which have to be preferred over the internal SoC reset, because the PMIC can reset not only the SoC but also the external devices. To pick the right way to reset a machine each handler has a priority. The default priority is 100 and all currently existing restart handlers are registered with this priority. of_get_restart_priority() allows to retrieve the priority from the device tree which makes it possible for boards to give certain restart handlers a higher priority in order to use this one instead of the default one. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tegra: jump to maincluster earlierLucas Stach2015-06-292-9/+9
| | | | | | | | There is no point in repeating the board setup on the main cluster. It is done either in the AVP startup path or from a first stage loader. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Abolish cpu_read* and cpu_write* accessorsMasahiro Yamada2015-05-201-2/+2
| | | | | | | | | | | | | | Commit 2e6a88f2101d (add cpu native ordered io accessors) introduced these macros and then commit be57f20cdd7d (Fix big endian MMIO primitives) figured out they are equivalent to __raw_{read,write}*. They turned out unnecessary after all. Anyway, most source files use __raw_read* and __raw_write*. Let's replace a few remaining references and abolish them. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tegra: add eMMC barebox update handlerLucas Stach2015-03-043-0/+103
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: avp_init: write DT address register earlierLucas Stach2015-03-031-3/+3
| | | | | | | | | Otherwise the write would be skipped if we are already running on the main CPU cluster. In practice this means that a second stage barebox will reuse the DT of the first stage, instead of using it's own. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* sizes.h: move include/sizes.h to include/linux/sizes.hMasahiro Yamada2015-01-083-3/+3
| | | | | | | | | | | | | | This file originates in Linux. Linux has it under include/linux/ directory since commit dccd2304cc90. Let's move it to the same place as well in barebox. This commit was generated by the following commands: find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:' git mv include/sizes.h include/linux/ Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: Reuse init_clock() return value for clocksource driversAlexander Shiyan2014-11-101-2/+1
| | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: remove custom UART setupLucas Stach2014-11-043-119/+0
| | | | | | | | | | The config option doesn't make any sense anymore when building a multiimage barebox. With a proper DT built into the image we don't need the ODMdata mechanism to find the debug UART anymore. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: pmc: add support for reset src detectionLucas Stach2014-11-042-0/+41
| | | | | | | Also activate in defconfig. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: jetson-tk1: enable 1.05V_RUNLucas Stach2014-11-041-0/+2
| | | | | | | Needed for the PCIe PLL amongst other things. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: pmc: work around power domain failureLucas Stach2014-11-031-0/+2
| | | | | | | | | Sometimes a power domain didn't properly power up, reading back the command register seems to fix this by flushing the write. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: pmc: add powerdomain handlingLucas Stach2014-10-082-3/+229
| | | | | | | | | In order to use some devices we first have to power up their power domain. Add support to do this in a generic way. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: tegra30: add PCIe clocksLucas Stach2014-10-081-0/+2
| | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: tegra: add PLLE setup functionsLucas Stach2014-10-081-0/+2
| | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/resource-err-ptr'Sascha Hauer2014-10-022-4/+6
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| * resource: Let dev_request_mem_region return an error pointerSascha Hauer2014-09-162-4/+6
| | | | | | | | | | | | For all users fix or add the error check. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | pinctrl: fix Kconfig dependenciesSascha Hauer2014-09-151-3/+0
|/ | | | | | | | | | | | | | | | | - Remove OFDEVICE dependency from PINCTRL. It won't do much then, so add a comment to Kconfig when PINCTRL is selected without OFDEVICE - Let Architectures only select PINCTRL instead of the particular driver. Change the drivers to 'default y if $SOC' to make sure the drivers are still compiled if the corresponding SoC is selected This fixes Kconfig warnings like: warning: (PINCTRL_ARMADA_370 && PINCTRL_ARMADA_XP && PINCTRL_DOVE && PINCTRL_KIRKWOOD) selects PINCTRL which has unmet direct dependencies (OFDEVICE) Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* arm: tegra: enable ARM errata workaroundsLucas Stach2014-06-261-2/+19
| | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: add NVIDIA Jetson-TK1 board supportLucas Stach2014-06-051-0/+4
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: pmc: add Tegra124 compatibleLucas Stach2014-06-051-0/+2
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: tegra: add Tegra124 supportLucas Stach2014-06-051-0/+1
| | | | | | | | | We can reuse the Tegra30 pinctrl driver, as the bit layout is the same. Just add the pin and drivegroups and some compile-time magic to avoid bloat. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: add Tegra124 Kconfig symbolLucas Stach2014-06-051-0/+3
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: add architectural timer initLucas Stach2014-06-053-0/+58
| | | | | | | | If the bootloader doesn't init the architectural timer on Cortex A15 Linux falls over when trying to boot. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: setup L2 cache on Tegra124Lucas Stach2014-06-051-1/+12
| | | | | | | Set SRAM latency to 3 clock cycles. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: hardcode entry address for main clusterLucas Stach2014-06-051-2/+16
| | | | | | | | | I don't know why get_runtime_offset fails on T124 yet, but this is a safe workaround, with the nice side-effect of fixing second stage barebox loading. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: apply cluster switch logic to all SoCs >=T30Lucas Stach2014-06-051-1/+1
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: add Tegra124 PLL_X rate setupLucas Stach2014-06-051-0/+8
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: change cpu internal reset layout for Tegra124Lucas Stach2014-06-051-4/+15
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: fix MESLECT clock enableLucas Stach2014-06-052-1/+3
| | | | | | | Don't disable clk to unrelated devices in the process. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: power up additional partitions on Tegra124Lucas Stach2014-06-052-6/+22
| | | | | | | Those 3 are needed to power CPU0 from the CPUG cluster. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* tegra: disable IDDQ for PLL_X on Tegra124Lucas Stach2014-06-052-0/+28
| | | | | | | This is an additional power down control. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>