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The ZynqMP boots from an SDHCI device by reading a boot.bin file from
the FAT16/32 partition, which is the first partition in the MBR.
The update handler copies a boot.bin image to this partition, which
might be board specific.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.barebox.org/20210624150054.1205422-5-m.tretter@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Port functions from xlnx-linux to get FPGA status and invoke bitstream
loading.
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In order to use the query() call, the users of the firmware driver need
to know the number of arguments.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Port Xilinx Zynq MPSoC Firmware layer driver from linux.
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the Xilinx Zynq Ultrascale+ MPSoC architecture (ZynqMP)
and the Xilinx ZCU104 board.
Barebox is booted as BL33 in EL-1 and expects that a BL2 (i.e. the FSBL)
already took care of initializing the RAM. Also for debug_ll, the UART
is expected to be already setup correctly. Thus, you have to add the
Barebox binary to a boot image as described in "Chapter 11: Boot and
Configuration" of "Zynq Ultrascale+ Device Technical Reference Manual".
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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