| Commit message (Collapse) | Author | Age | Files | Lines |
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Add a function to set the tap delay for the clk phase of the sd host
controller.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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Add a function to reset DLL logic for SD devices.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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The ZynqMP features eight 32-bit global storage registers that are
available for general use. Four of them have their values preserved
after software reboots and four are cleared on software reboots.
In Linux they are accessed as:
/sys/firmware/zynqmp/ggs[0-4]
/sys/firmware/zynqmp/pggs[0-4]
Allow reading and writing these parameters from barebox shell as well
via device parameters:
echo ${firmware:zynqmp-firmware.of.ggs0}
firmware:zynqmp-firmware.of.pggs0=4
Because the name is a bit unwieldy, use the recently added device alias
support to make the variables more compact:
echo ${zynqmp_fw.ggs0}
zynqmp_fw.pggs0=4
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20230913132456.2211919-4-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ZynqMP features eight 32-bit global storage registers that are available
for general use. Four of them have their values preserved after software
reboots and four are cleared on software reboots.
Import the Linux API used to read and write these registers.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20230913132456.2211919-3-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ZCU102 is a potentially interesting platform, because there's Qemu
support for it. It's not very straight forward to use, because the
ZynqMP support in barebox and Linux relies heavily on firmware services,
which are lacking when naively using Qemu.
Still, let's add support now and worry about running it as part of the
test suite later.
Board support was not tested on actual hardware, but on Qemu with
changes on top of barebox to skip the firmware communication.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20230913130150.2159921-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Syncing device trees with Linux upstream can lead to breakage, when
the device trees are switched to newer bindings, which are not yet
supported in barebox. To make it easier to spot such issues, we want to
start applying some heuristics to flag possibly problematic DT changes.
One step towards being able to do that is to know what nodes barebox
actually consumes. Most of the nodes have a compatible entry, which is
matched by an array of of_device_id, so let's have MODULE_DEVICE_TABLE
point at it for future extraction.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20230612125908.1087340-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move ZynqMP feature selection into submenu like done on the
other multiarch supporting architectures as well.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Currently arch specific headers can be included with
possible as there won't be a single mach anymore.
Move all Zynqmp specific header files to include/mach/zynqmp/ to
prepare for multi-arch support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The '_d' suffix was originally meant to distinguish barebox struct
names from Linux struct names. struct driver doesn't exist in Linux,
so we can rename it and remove the meaningless suffix.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.barebox.org/20221214123512.189688-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The '_d' suffix was originally introduced in case we want to import
Linux struct device as a separate struct into barebox. Over time it
became clear that this won't happen, instead barebox struct device_d
is basically the same as Linux struct device. Rename the struct name
accordingly to make porting Linux code easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.barebox.org/20221214123512.189688-3-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Linux struct device has the member of_node for the device_node pointer.
Rename this in barebox accordingly to minimize the necessary changes
when porting Linux code. This was done with the semantic patch:
@@ struct device_d E; @@
- E.device_node
+ E.of_node
@@ struct device_d *E; @@
- E->device_node
+ E->of_node
Plus some manual adjustments.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.barebox.org/20221214123512.189688-2-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Patterns like [ "$bootsource" = mmc ] && boot mmc$bootsource_instance
expect that ${bootsource_instance} and MMC aliases align, which may not
always be the case. In preparation for adding a new bootsource_set
function that consults an optional mapping table from bootrom
bootsource_instance to board-specific device numbering, rename all
existing instances to bootsource_set_raw. While at it, clean up the
legacy split into bootsource_set and bootsource_set_instance and have
the new bootsource_set_raw accept both arguments at once.
No functional change intended.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220720055042.3510276-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ZynqMP reports the mode pins sampled at POR via the register
ZYNQMP_CRL_APB_BOOT_MODE_USER. This commit adds a function that reads
the register and populates the boot source.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.barebox.org/20210913121350.9307-4-michael.riesch@wolfvision.net
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the Xilinx Zynq UltraScale+ MPSoC ZCU106 evaluation
board.
The changes are derived from the ZCU104 board support by applying
s/104/106/g (more or less).
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.barebox.org/20210913121350.9307-2-michael.riesch@wolfvision.net
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The update handler for zynqmp copies the boot.bin file into an existing
fat partition. There is already a better implementation by
bbu_register_std_file_update(). Drop the custom implementation.
Keep the previous functions with its signature to have an obvious common
update handler for all ZynqMP boards.
Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.barebox.org/20210818125848.560293-1-m.tretter@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ZynqMP boots from an SDHCI device by reading a boot.bin file from
the FAT16/32 partition, which is the first partition in the MBR.
The update handler copies a boot.bin image to this partition, which
might be board specific.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.barebox.org/20210624150054.1205422-5-m.tretter@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The reset reason is available in the APB register set on the ZynqMP.
Read the reset reason and set the reset source accordingly.
There might be multiple bits set in the APB register. Use the MSB for
determining the actual reset source.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.barebox.org/20210624150054.1205422-2-m.tretter@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We have several macros for a oneline driver registration. Add some
missing and use them consistently where possible througout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Port functions from xlnx-linux to get FPGA status and invoke bitstream
loading.
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In order to use the query() call, the users of the firmware driver need
to know the number of arguments.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The zynqmp_firmware node has sub-nodes for the various APIs to expose
the platform management, as e.g. clock management. Therefore, the driver
must populate the subnodes to initialize these drivers.
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Port Xilinx Zynq MPSoC Firmware layer driver from linux.
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the Xilinx Zynq Ultrascale+ MPSoC architecture (ZynqMP)
and the Xilinx ZCU104 board.
Barebox is booted as BL33 in EL-1 and expects that a BL2 (i.e. the FSBL)
already took care of initializing the RAM. Also for debug_ll, the UART
is expected to be already setup correctly. Thus, you have to add the
Barebox binary to a boot image as described in "Chapter 11: Boot and
Configuration" of "Zynq Ultrascale+ Device Technical Reference Manual".
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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