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* sama5d3x: fix AT91_SMC_CS offset strideMatteo Fortini2014-06-021-1/+3
| | | | | | | | | As stated in section 29.19.32 of SAMA5D3 Series datasheet, to move from CS(n) to CS(n+1) the stride is 0x14 and not 0x10 as in the other AT91 CPUs Signed-off-by: Matteo Fortini <matteo.fortini@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM Samsung: fix booting from NAND with pblMichael Olbrich2014-05-191-2/+3
| | | | | | | | | | The ARM pbl is linked at (TEXT_BASE - SZ_2M). This conflicts with the temporary stack used in s3c24x0_nand_boot. Moving the stack to (TEXT_BASE - SZ_2M) fixes this problem. With this patch a compressed barebox with pbl can boot on mini2440 from NAND. Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: edmqmx6: disable menu frameworkSilvio Fricke2014-05-191-3/+0
| | | | | Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: AM33xx: make bbu handler static inlineSascha Hauer2014-05-151-1/+1
| | | | | | | The static inline wrapper for am33xx_bbu_spi_nor_mlo_register_handler lacked the 'static inline'. add it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: radxa-rock: set hostname after devicetree initializationBeniamino Galvani2014-05-141-1/+1
| | | | | | | | | hostname_init() must be called after the devicetree root node has been initialized, otherwise the check on board compatible always returns false. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drop CONFIG_PARTITION_NEED_MTDSascha Hauer2014-05-132-2/+0
| | | | | | | | | | | | | | | | | | | | | | With CONFIG_PARTITION_NEED_MTD enabled we use mtd rather than devfs directly to create partitions on mtd devices. Since: | commit b32cd8df87b87ef744365138e145b829c02eb719 | Author: Sascha Hauer <s.hauer@pengutronix.de> | Date: Wed Apr 9 15:49:32 2014 +0200 | | mtd: nand: bb: use mtd api directly | | The devfs layer just adds an addition indirection between mtd | and the bb devices with no purpose. Drop it. | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> The bad block aware device creation doesn't work if this option is disabled. With this we remove CONFIG_PARTITION_NEED_MTD and always use mtd partitions on mtd devices. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: dts: Add generated files to clean ruleSascha Hauer2014-05-091-1/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: dts: i.MX53: tqma53: Readd barebox specificsMichael Olbrich2014-05-091-0/+8
| | | | | | | | | | | | Some of the barebox specific changes that were added in commit e0316b4dd7d6169f1f6e15d97d7f605e05dc265e got lost during the switch to use upstream dtsi files in commit bb7cf71cff6369beb0b3010028541d5e7a69e4d2. Especially the memory size is important since we have two different memory sizes which have to be handled. Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: dts: edmqmx6: use new dts approachSilvio Fricke2014-05-081-320/+11
| | | | | Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tegra30: ramp vdd_core to 1,2VLucas Stach2014-05-082-0/+19
| | | | | | | | | This isn't much different from the default 1,16V and I haven't seen this make a difference on any board, but it seems to be required for some T30 SKUs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: tegra30: slow down CPU to 600 MHzLucas Stach2014-05-081-4/+4
| | | | | | | | | | It's not safe to ramp up the CPU clock speed to 1,4 GHz on all T30 SKUs, as this may result in failure to start the kernel properly. Start CPU at 600 MHz, which is safe even for the slowest SKUs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: dts: remove unused i.MX pinfunc header filesSascha Hauer2014-05-073-1021/+0
| | | | | | These are now taken from the upstream files. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: phycard-imx6: fixup for barebox_arm_entry signature changeLucas Stach2014-05-071-2/+2
| | | | | | | | | This board wasn't changed properly, as it was merged in the short timeframe where the signature change waited to be applied. Change it now to get rid of the compiler warning. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: bootm: fix default uImage placementLucas Stach2014-05-051-7/+10
| | | | | | | | | | | | | For small systems we would put the zImage at 32KiB after the start of memory, and put the DT a bit after the uImage. The kernel will always try to relocate itself and overwrite the DT. Try to be more clever at uImage placement to avoid triggering the kernel relocation. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: bootm: be more clever while deciding where to put zImageLucas Stach2014-05-051-28/+29
| | | | | | | | | | | | | | For small systems we would put the zImage at 8MiB after the start of memory, and put the DT a bit after the zImage. When we encounter an image which is bigger than 8MiB uncompressed, the kernel would try to relocate itself and overwrite the DT. Try to be more clever at zImage placement to avoid triggering the kernel relocation. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: move malloc area to upper memory bank by defaultLucas Stach2014-05-051-49/+66
| | | | | | | | | | If we have two discontinuous memory banks we want to move the malloc area into the upper bank by default to leave as much free space in the lower bank, where we have to place kernel, oftree and initrd. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: phycore-am33xx: remove extra FDT memcpyLucas Stach2014-05-051-11/+2
| | | | | | | | Not needed anymore, as barebox now accepts FDTs outside of it's visible DRAM, as long as it's a valid pointer. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: eDM-QMX6: remove extra FDT memcpyLucas Stach2014-05-051-9/+0
| | | | | | | | Not needed anymore, as barebox now accepts FDTs outside of it's visible DRAM, as long as it's a valid pointer. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: beaglebone: remove extra FDT memcpyLucas Stach2014-05-051-16/+3
| | | | | | | | Not needed anymore, as barebox now accepts FDTs outside of it's visible DRAM, as long as it's a valid pointer. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: change signature of barebox_arm_entryLucas Stach2014-05-0587-196/+204
| | | | | | | | | | | Mostly to make it clear that boarddata needs to be something we can dereference. As this is a pretty invasive change, use the opportunity to make the signature 64bit safe. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Rockchip: use upstream dtsi filesBeniamino Galvani2014-05-053-668/+3
| | | | | Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/tegra'Sascha Hauer2014-05-0516-26/+1966
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/dts/tegra20-colibri.dtsi arch/arm/dts/tegra20-paz00.dts arch/arm/dts/tegra20.dtsi drivers/clk/tegra/clk-periph.c
| * defconfig: tegra: add some useful optionsLucas Stach2014-04-231-0/+8
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: dts: tegra: add full Beaver pinmuxLucas Stach2014-04-231-3/+416
| | | | | | | | | | | | | | Not fully validated yet, but seems to work. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: tegra: add NVidia Beaver board supportLucas Stach2014-04-237-1/+555
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: tegra: add basic Tegra3 DTLucas Stach2014-04-231-0/+892
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * pinctrl: tegra: add Tegra3 driverLucas Stach2014-04-231-0/+1
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * tegra: recognize T30 in debug UART codeLucas Stach2014-04-232-3/+21
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * tegra: add Tegra3 mem initcallLucas Stach2014-04-231-1/+15
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * tegra: add Tegra3 ramsize detectionLucas Stach2014-04-232-1/+26
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * tegra: add Tegra3 kconfig symbolLucas Stach2014-04-231-0/+3
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * tegra: source MSELECT clock from CLK_MLucas Stach2014-04-231-2/+2
| | | | | | | | | | | | | | | | | | We need to reprogram PLL_P at a later time, so we have to make sure MSELECT is able to operate correctly when we stop PLL_P. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * tegra: disable more lowlevel unsafe switch optimizationsLucas Stach2014-04-233-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | fno-jump-tables isn't enough to guard against gcc switch optimizations that are unsafe to use in code that runs before relocation. The switch-tree-conversion opt pass may generate lookup tables that are placed in the data section and accessed via absolute adressing, which fails prior to relocation. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: dts: update colibri + iris DTs to Linux 3.14Lucas Stach2014-04-072-117/+126
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: dts: update paz00 DT to Linux 3.14Lucas Stach2014-04-071-22/+34
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: dts: update Tegra20 base dtsi to Linux 3.14Lucas Stach2014-04-071-44/+151
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * imx53: add imx53_add_cspiWjatscheslaw Stoljarski2014-04-071-0/+5
| | | | | | | | | | Signed-off-by: Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski@kiwigrid.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/rockchip'Sascha Hauer2014-05-0521-5/+1155
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| * | ARM: Rockchip: switch to multiimage supportSascha Hauer2014-04-297-28/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add images/Makefile.rockchip - Allow multiple boards to be selected - protect initcalls with appropriate of_machine_is_compatible - rename board specific config to SoC config - Add dtb file to compilation - turn barebox_arm_reset_vectorto ENTRY_FUNCTION - pass dtb to barebox_arm_entry Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rockchip: add radxa-rock boardBeniamino Galvani2014-04-297-0/+180
| | | | | | | | | | | | | | | Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: add Rockchip devicetree filesBeniamino Galvani2014-04-294-0/+753
| | | | | | | | | | | | | | | Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: add rockchip pinctrl and gpio driversBeniamino Galvani2014-04-291-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | clk: add rockchip clock gate driverBeniamino Galvani2014-04-291-0/+3
| | | | | | | | | | | | | | | Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | clk: gate: add flags argument to clock gate constructorBeniamino Galvani2014-04-292-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | This adds a clk_gate_flags argument to clock gate creation functions to allow the introduction of new clock gate modifiers. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: rockchip: add PLL initialization functionBeniamino Galvani2014-04-293-0/+129
| | | | | | | | | | | | | | | Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: add basic support for Rockchip SoCsBeniamino Galvani2014-04-296-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds a basic support for the ARM-based Rockchip SoCs of the RK3xxx family. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2014-05-051-2/+0
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| * | | ARM: Remove excess "select GENERIC_GPIO"Alexander Shiyan2014-04-291-2/+0
| |/ / | | | | | | | | | | | | | | | | | | GENERIC_GPIO is selected automatically by GPIOLIB Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/ioresource'Sascha Hauer2014-05-056-6/+11
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| * | | x86: ns16550: Rework driver to allow for x86 I/O spaceMichel Stam2014-04-095-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation fakes a memory-mapped I/O device at 0x3f8 and 0x2f8, then uses platform read/write functions to do the actual reading and writing. These platform functions only exist for the x86 platform; better to move the I/O routines into the driver and have the driver request I/O ports using request_ioport_region. Signed-off-by: Michel Stam <michel@reverze.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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