summaryrefslogtreecommitdiffstats
path: root/arch/mips/include
Commit message (Collapse)AuthorAgeFilesLines
* MIPS: relocation: do not use configurable memory layoutOleksij Rempel2019-04-231-2/+2
| | | | | | | | | The relocator is not able to patch properly new location of the stack. To make it work properly it is better to disable HAVE_CONFIGURABLE_MEMORY_LAYOUT. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: relocation: add relocation supportOleksij Rempel2019-04-232-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this patch i a port of following patch from u-boot with some additional integration changes and fixes of original code: | Subject: [PATCH] MIPS: Stop building position independent code | | U-Boot has up until now built with -fpic for the MIPS architecture, | producing position independent code which uses indirection through a | global offset table, making relocation fairly straightforward as it | simply involves patching up GOT entries. | | Using -fpic does however have some downsides. The biggest of these is | that generated code is bloated in various ways. For example, function | calls are indirected through the GOT & the t9 register: | | 8f998064 lw t9,-32668(gp) | 0320f809 jalr t9 | | Without -fpic the call is simply: | | 0f803f01 jal be00fc04 <puts> | | This is more compact & faster (due to the lack of the load & the | dependency the jump has on its result). It is also easier to read & | debug because the disassembly shows what function is being called, | rather than just an offset from gp which would then have to be looked up | in the ELF to discover the target function. | | Another disadvantage of -fpic is that each function begins with a | sequence to calculate the value of the gp register, for example: | | 3c1c0004 lui gp,0x4 | 279c3384 addiu gp,gp,13188 | 0399e021 addu gp,gp,t9 | | Without using -fpic this sequence no longer appears at the start of each | function, reducing code size considerably. | | This patch switches U-Boot from building with -fpic to building with | -fno-pic, in order to gain the benefits described above. The cost of | this is an extra step during the build process to extract relocation | data from the ELF & write it into a new .rel section in a compact | format, plus the added complexity of dealing with multiple types of | relocation rather than the single type that applied to the GOT. The | benefit is smaller, cleaner, more debuggable code. The relocate_code() | function is reimplemented in C to handle the new relocation scheme, | which also makes it easier to read & debug. | | Taking maltael_defconfig as an example the size of u-boot.bin built | using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils | 2.24.90) shrinks from 254KiB to 224KiB. | | Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: relocation: pass ram size to pbl_main_entryOleksij Rempel2019-04-231-1/+2
| | | | | | | | To make barebox dynamically relocatable it should know the RAM size to be able to calculate proper new location. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2019-02-131-35/+0
|\
| * move umode_t typedef from asm/types.h to linux/types.hAntony Pavlov2019-01-181-6/+0
| | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: asm/types.h: drop unused stuffAntony Pavlov2019-01-181-29/+0
| | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | MIPS: ath79: add spi and sram bootstrap helpersOleksij Rempel2019-01-241-0/+20
|/ | | | | | | | | | | | | | | | | | | | | | | | | At least some ath79 SoC have build in 32K RAM. It allow us to use lowlevel portion of barebox to bootstrap the system by using JTAG debugger (For example OpenOCD). Since ath79 has no reliable way to stop the CPU execution before reading SPI Flash, this can cause different issues. To avoid it, we need to flash a execution trap with software debug breakpoint to the flash. The workflow should be as follow: - After power on or reset the CPU will start execution of SPI flash. As soon as software debug breakpoint is executed, CPU will halt and notify OpenOCD about breakpoint event. - OpenOCD will load reduced barebox to SRAM and execute it. This part will do all needed low level initialization - PLL, RAM and trigger second breakpoint event. - OpenOCD will load full barebox version to the main RAM and start execution. It can be used for bring-up, so no regular flashing is needed. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: convert files with not precise GNU version to SPDXOleksij Rempel2019-01-0316-66/+16
| | | | | | | | | Default barebox license is GPL-2.0-only. Set it to the files with the missing one. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: migrate all files to SPDXOleksij Rempel2019-01-0310-117/+10
| | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Roland Hieber <r.hieber@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: multiimage: add ENTRY_FUNCTION macrosOleksij Rempel2018-12-131-0/+29
| | | | | Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: don't include generated header files into MIPS asm filesAntony Pavlov2018-07-021-3/+1
| | | | | | | | | This patch came out of discussions in the 'MIPS parallel build breakage' e-mail thread: http://lists.infradead.org/pipermail/barebox/2018-March/032251.html Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: fix copy_to_link_location for 64 bit modePeter Mamonov2018-05-241-10/+11
| | | | | | | | | MIPS `lw` instruction loads a 32 bit word from memory on both 32 bit and 64 bit systems. On the other hand LONGSIZE is either 4 or 8 depending on selected code model. This discrepancy causes copy_to_link_location failure on 64 bit systems. Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add proper IOMEM() declaration for MIPS64Peter Mamonov2018-05-241-0/+4
| | | | | Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* include/common.h: move IOMEM declaration for MIPS to arch/mips/include/asm/io.hPeter Mamonov2018-05-241-0/+2
| | | | | Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: import 64-bit address conversion macrosPeter Mamonov2018-05-241-0/+20
| | | | | Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add virt_to_phys() and phys_to_virt()Antony Pavlov2017-08-151-0/+25
| | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* MIPS: add 74Kc infoOleksij Rempel2017-07-311-0/+2
| | | | | | | This patch is preparation for SoC QCA AR9344 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* MIPS: drop redundant debug_ll_outhexw macro definesAntony Pavlov2017-01-102-32/+31
| | | | | | | | | | | | The debug_ll_outhexw macro has no dependency on UART model so we can remove it from UART-dependent header files (debug_ll_ns16550.h and mach-ath79/.../debug_ll.h). On the other hand the only debug_ll_outhexw user is MIPS nmon monitor so we can move the debug_ll_outhexw macro to pbl_nmon.h. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: implement dma_sync_* functionsPeter Mamonov2016-03-091-1/+10
| | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: flush cache on shutdownAntony Pavlov2016-03-091-0/+6
| | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add initial R4000-style cache supportAntony Pavlov2016-03-092-0/+10
| | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: pbl: import cache init code from U-Boot v2016.01-212-ga3ab2aeAntony Pavlov2016-03-093-0/+170
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: import optimized string functions from LinuxAleksey Kuleshov2015-11-261-1/+8
| | | | | | | | | 10x performance gain according to simple test on QEMU malta: barebox:/ time memcpy 0xa0000000 0xa0001000 0x100000 Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru> Acked-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: pbl: add pbl_blt macroOleksij Rempel2015-11-131-0/+12
| | | | | | | | | | | | | | | | | | | | | | Barebox' PBL is able to initialize SoC's memory controller, but it can be used only if PBL runs from ROM or on-chip SRAM. MIPS architecture standard boot vector is 0xbfc00000 so on most MIPS SoCs all addresses higher than 0xbfc00000 belong to boot ROM or on-chip SRAM. Thus there's a simple criterion to check if PBL runs from ROM: just check if current PC is higher than 0xbfc00000. Some MIPS boards have ROM start address lower than 0xbfc00000 so it's reasonable to make ROM start address checking board-dependant. The pbl_blt macro checks if current pc is lower than the first argument (ROM start address). If so then next instruction executed is defined by the second argument of the macro. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Tested-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: allow user to pass incorrect address to md commandAntony Pavlov2015-11-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | This commit makes it possible to handle exception on incorrect data access so 'md' command just show 'xxxxxxxx' instead of crashing the system. barebox:/ md -l 0xa0000003+4 a0000003: xxxxxxxx .... Without this commit we will get this barebox:/ md -l 0xa0000003+4 a0000003: Ooops, address error on load or ifetch! ... ### ERROR ### Please RESET the board ### Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: import exception registers restoring macros from linux kernelAntony Pavlov2015-11-111-0/+87
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: avoid excessive exceptionAntony Pavlov2015-11-111-1/+1
| | | | | | | | | This commit clears ERL (ERror Level) flag on start. If this flag is set then we get 'TLB miss on load or ifetch' just after return from exception. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/mips'Sascha Hauer2015-11-061-0/+32
|\
| * MIPS: ath79: add pbl_ar9331_uart_enable macroAntony Pavlov2015-11-031-0/+11
| | | | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MIPS: ath79: add pbl_ar9331_pll macroOleksij Rempel2015-11-031-0/+21
| | | | | | | | | | | | Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | rework remap_rangeSascha Hauer2015-11-031-13/+1
|/ | | | | | | | | | | | | | | | | | remap_range is for remapping regions with different cache attributes. It is implemented for ARM and PowerPC only, the other architectures only provide stubs. Currently the new cache attributes are passed in an architecture specific way and the attributes have to be retrieved by calls to mmu_get_pte_cached_flags() and mmu_get_pte_uncached_flags(). Make this simpler by providing architecture independent flags which can be directly passed to remap_range() Also provide a MAP_ARCH_DEFAULT flag and a arch_can_remap() function. The MAP_ARCH_DEFAULT defaults to whatever caching type the architecture has as default. the arch_can_remap() function returns true if the architecture can change the cache attributes, false otherwise. This allows the memtest code to better find out what it has to do. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* gpio: Drop asm-generic/gpio.hSascha Hauer2015-08-201-6/+0
| | | | | | | | | | Since we no longer have custom gpio function prototypes we can drop the prototypes from asm-generic/gpio.h can add them to include/gpio.h instead. While at it add static inline dummy wrappers for !CONFIG_GENERIC_GPIO so that code using gpios can compile without gpio support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/posix_types'Sascha Hauer2015-06-093-144/+2
|\
| * mips: use generic posix_types.hSascha Hauer2015-06-031-129/+1
| | | | | | | | | | | | | | Use generic asm-generic/posix_types.h instead of repeating the typedefs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * drop __BITS_PER_LONGSascha Hauer2015-05-221-3/+1
| | | | | | | | | | | | | | | | | | The kernel has __BITS_PER_LONG and BITS_PER_LONG. The formaer is needed for architectures which support 32bit userspace on a 64bit kernel. This is not relevant for barebox, so drop __BITS_PER_LONG and use BITS_PER_LONG only. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * dma: Use generic place for dma_addr_t typedefSascha Hauer2015-05-221-12/+0
| | | | | | | | | | | | | | | | | | Instead of letting all architectures define their own dma_addr_t use a common place in include/linux/types.h and use a Kconfig symbol that architectures can select to define the width of dma_addr_t. The same is done in the Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | MIPS: asm/debug_ll_ns16550.h: use plain inline instead of __inline__Antony Pavlov2015-06-041-1/+1
|/ | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: debug_ll_ns16550.h: drop _ns16550 suffixAntony Pavlov2015-05-052-21/+20
| | | | | | | | | | | | | This commit makes it possible to have unified debug_ll_* assembler routines for differrent UART program model. E.g. we can use debug_ll_putc() routine in common code without knowledge on exact UART model: ns16550 or ar933x. Also rename *_check_char -> *_tstc. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: change dma_alloc/free_coherent to common prototypesLucas Stach2015-03-062-3/+5
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mips: qemu-malta: add little-endian mode supportAntony Pavlov2014-10-101-0/+7
| | | | | | | | | | | | | | | | | We can't just enable SYS_SUPPORTS_LITTLE_ENDIAN for successful little-endian qemu-malta barebox build. Some byte swapping-related macros are missed, e.g.: arch/mips/mach-malta/pci.c: In function 'pcibios_init': arch/mips/mach-malta/pci.c:218:28: error: 'GT_PCI0_CMD_MBYTESWAP_BIT' undeclared (first use in this function) GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT | ^ This patch adds necessary macros definition. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add (another) Ingenic vendor IDAntony Pavlov2014-09-111-0/+1
| | | | | | | | | | | | | | | | | | | The latest Ingenic CPUs (e.g. JZ4780) use new vendor ID. Based on commit from https://github.com/MIPS/CI20_linux/tree/ci20-v3.16 commit 00b672aa52f299f1d67ab18274c3f5e5d5a15767 Author: Paul Burton <paul.burton@imgtec.com> Date: Mon Jul 8 12:14:28 2013 +0100 MIPS: add (another) Ingenic vendor ID Ingenic have switched to a new vendor ID for the Xburst core used in their current SoCs such as the jz4780. Add this vendor ID and handle it in addition to their former vendor ID. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* consistently use the same bitops.h fileSascha Hauer2014-07-171-11/+15
| | | | | | | | | | | | | | | | We have many variants of the same bitops.h file. Consistently use the same file for all architectures which completely use the generic bitops versions. Some architectures had static inline versions of functions identically to the generic versions, these are removed and the generic versions are used directly now. Also several architectures depend on the generic find_*_bit functions but didn't have the GENERIC_FIND_NEXT_BIT Kconfig option selected. This is added where needed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add PCI support for GT64120-based Malta boardAntony Pavlov2014-07-041-0/+53
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add dma_alloc_coherent()Antony Pavlov2014-07-041-0/+25
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add <asm/gpio.h> header fileAntony Pavlov2014-06-241-0/+6
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mips: io: include generic io.hSascha Hauer2014-04-091-0/+2
| | | | | | | To get definitions for inb/outb and friends. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: Antony Pavlov <antonynpavlov@gmail.com>
* common: Allow for I/O mapped I/OMichel Stam2014-04-081-0/+2
| | | | | | | | Rework the current framework so that I/O mapped I/O resources are also possible. Signed-off-by: Michel Stam <michel@reverze.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: mach-xburst: fix DEBUG_LL=n build errorAntony Pavlov2014-03-281-0/+2
| | | | | | | | | | | | | | | | | Here is my error log: CC common/startup.o In file included from arch/mips/mach-xburst/include/mach/debug_ll.h:25, from include/debug_ll.h:31, from common/startup.c:36: arch/mips/include/asm/debug_ll_ns16550.h: In function 'PUTC_LL': arch/mips/include/asm/debug_ll_ns16550.h:62: error: 'DEBUG_LL_UART_ADDR' undeclared (first use in this function) arch/mips/include/asm/debug_ll_ns16550.h:62: error: (Each undeclared identifier is reported only once arch/mips/include/asm/debug_ll_ns16550.h:62: error: for each function it appears in.) make[1]: *** [common/startup.o] Error 1 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add Loongson-1B processor constants and CPU probeAntony Pavlov2014-01-211-0/+27
| | | | | | | | | | | | | | | | | | | | | | This commit is based on this linux commit: commit 2fa36399e63c911134f28b6878aada9b395c4209 Author: Kelvin Cheung <keguang.zhang@gmail.com> Date: Wed Jun 20 20:05:32 2012 +0100 MIPS: Add CPU support for Loongson1B Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mips asm/types.h: add #ifndef to fix compile errorDu Huanpeng2014-01-061-0/+4
| | | | | | | | without "#ifndef __ASSEMBLY__ #endif", an assembly file including this file will break compilation. Signed-off-by: Du Huanpeng <u74147@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-25 09:52:36 +0000