| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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remap_range is for remapping regions with different cache attributes.
It is implemented for ARM and PowerPC only, the other architectures only
provide stubs.
Currently the new cache attributes are passed in an architecture specific
way and the attributes have to be retrieved by calls to
mmu_get_pte_cached_flags() and mmu_get_pte_uncached_flags().
Make this simpler by providing architecture independent flags which can
be directly passed to remap_range()
Also provide a MAP_ARCH_DEFAULT flag and a arch_can_remap() function.
The MAP_ARCH_DEFAULT defaults to whatever caching type the architecture
has as default. the arch_can_remap() function returns true if the
architecture can change the cache attributes, false otherwise. This
allows the memtest code to better find out what it has to do.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use generic asm-generic/posix_types.h instead of repeating the
typedefs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This introduces the bitsperlong.h file for the remaining architectures.
It's purpose is to define BITS_PER_LONG which in the next step can be used
by a generic posix_types.h file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead of letting all architectures define their own dma_addr_t use
a common place in include/linux/types.h and use a Kconfig symbol that
architectures can select to define the width of dma_addr_t. The same
is done in the Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We have many variants of the same bitops.h file. Consistently
use the same file for all architectures which completely use
the generic bitops versions.
Some architectures had static inline versions of functions
identically to the generic versions, these are removed and
the generic versions are used directly now.
Also several architectures depend on the generic find_*_bit
functions but didn't have the GENERIC_FIND_NEXT_BIT Kconfig
option selected. This is added where needed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The OpenRISC architecture specification v1.0 defines
new SPR registers. This patch adds registers definition
for group 0 and update bit definitions for the CPU
configuration register.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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openrisc does nothing special in the io accessors, so use the generic
ones as the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.
Add dummy function for others architectures that doesn't
have mmu or pte support.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Copied directly from Linux header file
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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inlines
Some drivers call dma_inv_range() on buffers, on arm these buffers must
be cache line aligned. This patch introduces a generic dma_alloc,
dma_free. Archs can implement in their own functions in "asm/dma.h" and add a:
#define dma_alloc dma_alloc
#define dma_free dma_free
On all other archs the generic versions, which translate into xmalloc
and free are used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We already have a phys_size_t since:
commit 2f05b6925676e5f3263e0d51ed2f0a92201400d8
Author: Renaud Barbier <renaud.barbier@ge.com>
Date: Fri May 11 11:58:13 2012 +0100
linux/types.h: define phys_size_t
Add this definition in preparation for the introduction of the
mpc85xx support.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix build due to redefinition of this type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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OpenRISC is the original flagship project of the OpenCores community.
This project aims to develop a series of general purpose open source
RISC CPU architectures.
A team from OpenCores provided the first implementation, the OpenRISC
1200, written in the Verilog hardware description language.
Even though I should have created an mach-or1200 directory, it is not
necessary for now. The OpenRISC 1200 CPU is the only one available and
it will be for some time.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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