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The early initialisation of chip select 0 (boot flash) is removed
from cpu initialisation. This removes the dependency on board
base address definition.
Consequently, cpu_init_f is not called in the start-up code but
added to the init call list as cpu_init_r. Also the file
arch/ppc/mach-mpc85xx/fsl_lbc.c is deleted.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch defines functions to set interrupt vector registers and
functions to handle hardware exceptions.
It also defines support functions to set and search TLBs.
Finally, the Makefile is added.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is the first part of the start-up code. The source code origin is
U-boot and is slightly modified to have e500v2 CPU support in 32-bit
mode only.
It includes the power-up entry point, CPU initialization code and
exports definition for D-cache flush and I-cache invalidate.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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