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* ppc: mpc8xxx: add DDR3 supportRenaud Barbier2014-03-1910-99/+770
| | | | | | | | | | | | | | | | Add DDR3 support into the MPC8xxx DDR driver. To avoid confusion, the function set_ddr_sdram_mode is renamed set_ddr2_sdram_mode. Checking for errors is simplified in the DDR2 DIMM parameters computation to be consistent with DDR3. This code is derived from the files found in directory drivers/ddr/fsl from U-Boot version git-be937b5. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc 8xxx: Fix logicAlexander Shiyan2014-01-291-1/+1
| | | | | | | | Expression (pdimm->data_width >= 32) || (pdimm->data_width <= 40) always evaluates to true, so probably we need to use "&&" here. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc: mpc85xx: enable DDR driverRenaud Barbier2013-11-061-0/+2
| | | | | | | | | | | | | The use of the DDR driver as well as early I2C support is enabled for board initialising their memory through SPD EEPROM data. A SOC specific function returning the DDR bus frequency is added for the DDR driver to translate DDR timings to register values. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc ddr-8xxx: misplaced parenthesisRenaud Barbier2013-07-221-1/+1
| | | | | Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc 8xxx: core DDR driver functionsRenaud Barbier2013-06-272-0/+296
| | | | | | | | | | | | | These files are the driver interface to handle the memory initialisation from reading the SPD data to writing the memory controller registers. This code is based on the equivalent files main.c in directory arch/powerpc/cpu/mpc8xxx/ddr and ddr-gen2.c in directory arch/powerpc/cpu/mpc85xx. Both are from U-Boot version git-a71d45d. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppx 8xxx: DDR registers value calculationRenaud Barbier2013-06-271-0/+425
| | | | | | | | | | | The functions in this file calculate and store the value for each register of the memory controller. This code is based on the equivalent file in directory arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc 8xxx: DDR utility and memory optionsRenaud Barbier2013-06-272-0/+211
| | | | | | | | | | | This commit adds functions to calculate clock cycles, configure the LAW registers and populate board memory options. This code is based on the equivalent files in directory arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc 8xxx: DIMM parameters calculationRenaud Barbier2013-06-272-0/+517
| | | | | | | | | | | | | | | This code calculates the DIMM characteritics i.e DIMM organization parameters and timings for DDR2 memory based on SPD data. It also provides a function to find out the lowest common DIMM parameters to be used for all DIMMs. This code is based on the equivalent files in directory arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc 8xxx: DDR headersRenaud Barbier2013-06-272-0/+149
Structures are defined to record the common DIMM parameters and memory options on a per DIMM basis. This code is based on the equivalent files in directory arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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