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* ppc: P1022DS: update Kconfig and MakefileRenaud Barbier2014-03-191-9/+24
| | | | | | | | Kconfig and make files are updated to build the Freescale P1022DS image. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc: mpc85xx: add stashing supportRenaud Barbier2014-03-191-0/+8
| | | | | | | | | | The eTSEC 2.0 devices found on the 85xx family of SoCs support stashing buffer descriptors in the L2 cache. This updates the device tree fixup for these devices to ensure that the stashing related properties used by Linux are initialised correctly. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc: add Freescale P1022DS board supportRenaud Barbier2014-03-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | Add support for the Freescale P1022DS. Driver support is limited to: - I2C - Ethernet - Serial - NOR flash - PIXIS FPGA System clock configuration is read from the FPGA but has only been tested using a 133MHz system clock and 100MHz DDR clock. Boot arguments are defined in the environment to boot over NFS with a console configured at 115200 bauds. Enabling branch prediction is moved from board support to the platform support for all boards as it is a CPU feature. Some the code is from U-Boot version git-be937b5. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* common: DDR3 SPD verification supportRenaud Barbier2014-03-181-0/+1
| | | | | | | | | Add DDR3 SPD verification support for use by the PPC 8xxx DDR driver. This is based on the equivalent files from U-Boot version git-be937b5. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc: add SoC support for Freescale P1022Renaud Barbier2014-03-183-3/+41
| | | | | | | CPU, DDR, and LBC definitions are added to support the Freescale P1022. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/ppc'Sascha Hauer2014-03-074-3/+24
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| * ppc: P2020RDB and DA923RC configurationRenaud Barbier2014-03-031-0/+3
| | | | | | | | | | | | | | Enable memtest, MMU and iomem support on the P2020RDB and DA923RC. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ppc: add support for memtest with cache disabledRenaud Barbier2014-03-031-0/+5
| | | | | | | | | | | | | | | | | | Add support to enable caching on a memory region during the memory test. Tested on P2020RDB and DA923RC. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * MPC85xx: fix memory layout to prevent corruption during memtestRenaud Barbier2014-03-032-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | Memory regions on MPC85xx boards are incorrectly defined leading to corruption when running memory tests. This patch updates the memory layout of MPC85xx boards so that critical memory regions can be correctly reserved during the memory test. Tested on the P2020RDB and DA923RC. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ppc: mpc85xx: fix memory size calculationRenaud Barbier2014-02-141-2/+2
|/ | | | | | | | | Fix the chip select configuration register offset increment and summing of bank size so that, for chip select index greater than 0, barebox can determine the total memory size from enabled banks. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/ppc'Sascha Hauer2014-02-035-1/+173
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| * ppc: cpu-85xx: import U-Boot start-up codeRenaud Barbier2014-01-162-1/+5
| | | | | | | | | | | | | | | | | | Import U-Boot start-up code from version git-9407c3fc to include the latest CPUs errata and make future U-Boot code inclusion easier. The code import is limited to the currently supported CPUs P2020/MPC8544. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ppc: mpc85xx: change bss relocationRenaud Barbier2014-01-161-2/+5
| | | | | | | | | | | | | | | | | | The linker script and start up code are updated so that the bss section is located above the barebox binary in memory. This removes the reliance on a hard-coded value. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ppc: mpc85xx: use common linker scriptRenaud Barbier2014-01-163-0/+165
| | | | | | | | | | | | | | | | Updates to use a common linker script for all mpc85xx boards, avoiding duplication. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ppc: remove bit operation headers file conflictRenaud Barbier2014-01-302-0/+21
|/ | | | | | | | | | | | | Removed the ppc bit operation functions and definitions in the ppc file asm/bitops.h since these are already defined in the asm-generic header files. Moved ffs64 definition to the mpc85xx header files because the function requires the inclusion of linux/log2.h which also includes asm/bitops.h. The conflict was noted when UBIFS was enabled in barebox. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/ppc'Sascha Hauer2013-12-062-0/+8
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| * ppc: mpc85xx: add fsl,mpic node frequency propertyRenaud Barbier2013-11-182-0/+8
| | | | | | | | | | | | | | | | | | The clock frequency property of the device tree node fsl,mpic is added as it is needed by the PCI driver to function in newer Linux version. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Cleanup Kconfig filesAlexander Shiyan2013-11-111-4/+4
|/ | | | | | | | | This patch provides a global cleanup barebox Kconfig files. This includes replacing spaces to tabs, formatting in accordance format. No functional changes. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/rpi'Sascha Hauer2013-11-071-2/+2
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| * of: Add a context pointer to fixup functionsSascha Hauer2013-11-061-2/+2
| | | | | | | | | | | | | | If drivers want to fixup their specific instance they need some context to know which instance they have to fixup. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ppc: mpc85xx: build directivesRenaud Barbier2013-11-062-7/+27
| | | | | | | | | | | | | | | | Add the Kconfig and Makefile directives to build barebox for the GEIP DA923RC board. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ppc: mpc85xx: enable DDR driverRenaud Barbier2013-11-064-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | The use of the DDR driver as well as early I2C support is enabled for board initialising their memory through SPD EEPROM data. A SOC specific function returning the DDR bus frequency is added for the DDR driver to translate DDR timings to register values. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ppc: mpc85xx: define Ethernet port countRenaud Barbier2013-11-062-1/+3
| | | | | | | | | | | | | | | | | | | | Because the port count is different between the MPC8544 and existing CPU support, the Ethernet port count is defined on a per CPU basis. Accordingly, the TBI PHY initialisation code is updated. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ppc: mpc85xx: mpc8544 supportRenaud Barbier2013-11-066-0/+103
|/ | | | | | | | | | | | Definitions are added to support the mpc8544 sOC. The function returning the I2C bus frequency is updated to take into account the mpc8544 specific clock ratio. A mininal GPIO API is added to enable and set the GPIO out pins. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* console: factorise function to get the first enabled consoleJean-Christophe PLAGNIOL-VILLARD2013-10-061-3/+1
| | | | | | | rename it to console_get_first_active Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/powerpc'Sascha Hauer2013-09-052-0/+147
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| * ppc: add and update device tree fixup functionsRenaud Barbier2013-09-052-0/+147
| | | | | | | | | | | | | | | | | | | | | | This adds support for populating derived properties of the mpc85xx SOC which are not typically included in the dtb directly. This update is based on U-Boot code from common/fdt_support.c and arch/powerpc/cpu/mpc85xx/fdt.c - version git-2b26201. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Set model and hostname at boardlevelSascha Hauer2013-08-161-3/+0
|/ | | | | | | | | | | | With multiboard support the compiletime generated BOARDINFO string gets more and more meaningless. This removes it from Kconfig and replaces it with a variable that can be set at boardlevel. Also many boards have a standard setting for the hostname in the environment. This patch also moves the standard to C code by calling barebox_set_hostname(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mpc85xx: remove local bus initialisationRenaud Barbier2013-08-053-20/+3
| | | | | | | | | | | | | The early initialisation of chip select 0 (boot flash) is removed from cpu initialisation. This removes the dependency on board base address definition. Consequently, cpu_init_f is not called in the start-up code but added to the init call list as cpu_init_r. Also the file arch/ppc/mach-mpc85xx/fsl_lbc.c is deleted. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc 85xx: early I2C supportRenaud Barbier2013-06-272-0/+270
| | | | | | | | | | | Early I2C support is introduced to read SPD data from memory modules prior to the loading of the I2C driver. This code is based on the equivalent file fsl_i2c.c in directory drivers/i2c from U-Boot version git-a71d45d. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc: gianfar MDIO busesRenaud Barbier2013-06-252-16/+32
| | | | | | | | | | This commit creates MDIO bus devices to separate the MDIO bus abstraction from the Ethernet device initialisation. It also updates the configuration of the P2020RDB ports. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Cleanup Kconfig filesAlexander Shiyan2012-12-081-1/+2
| | | | | | | | | This patch provides a global cleanup barebox Kconfig files. This includes replacing spaces to tabs, formatting in accordance format, removing extraneous lines and spaces. No functional changes. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Treewide: remove address of the Free Software FoundationSascha Hauer2012-09-179-36/+0
| | | | | | | The FSF address has changed in the past. Instead of updating it each time the address changes, just drop it completely treewide. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* fsl TSEC: register map boundaryRenaud Barbier2012-09-111-3/+3
| | | | | | | | The end boundary of each registers set may overlap with the start of the next register set. Subtract 1 to the end boundary. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/ppc'Sascha Hauer2012-09-054-0/+89
|\ | | | | | | | | | | | | Conflicts: arch/ppc/boards/freescale-p2020rdb/p2020rdb.c arch/ppc/configs/p2020rdb_defconfig arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h
| * fsl: Freescale TSEC specific initialization.Renaud Barbier2012-08-102-0/+50
| | | | | | | | | | | | | | | | | | The fsl_eth_init function maps the TSEC registers (MAC, TBI and external PHY access registers). It also passes the PHY address and TBI registers initialization values. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net: GIANFAR driverRenaud Barbier2012-08-101-0/+31
| | | | | | | | | | | | | | | | This update adds the GIANFAR driver along with the configuration and build files. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ppc: GIANFAR base address definitionRenaud Barbier2012-08-101-0/+7
| | | | | | | | | | | | | | | | In view of the introduction of the GIANFAR Ethernet driver, the mdio and gianfar base address are defined. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i2c: adapt the i2c-imx driver to mpc85xx machinesRenaud Barbier2012-09-041-0/+3
| | | | | | | | | | | | | | | | | | A function to calculate the frequency divider and digital filter sampling rate for the 85xx processors is added to the i2c-imx driver. Hence, this driver is usable on IMX and 85xx machines. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | mpc85xx: header updateRenaud Barbier2012-09-043-2/+2
| | | | | | | | | | | | | | | | In order to use the IMX i2c driver on the mpc85xx SOC, the file mach/clocks.h is renamed mach/clock.h. Files using this header are updated accordingly. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | mpc85xx: i2c frequencyRenaud Barbier2012-09-032-0/+10
|/ | | | | | | | A function that returns the system bus frequency used to compute the i2c bus frequency is added for future use. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clocksource: move the NSEC_PER_SEC constant to common headerAntony Pavlov2012-06-291-2/+0
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MPC85xx start-up support codeRenaud Barbier2012-05-175-0/+334
| | | | | | | | | | This patch adds initialization functions used by the e500v2 start-up code and board specific code (L2 cache initialization). Other functions help identify the CPU or return the programmed memory size. Finally, the Makefile and Kconfig file are added. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 85xx clocking supportRenaud Barbier2012-05-172-0/+157
| | | | | | | | | This patch contains functions that returns information on the CPU and buses frequency (LBC, DDR, system). It also includes the clock source driver. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 85xx: LAW and LBC initializationRenaud Barbier2012-05-172-0/+177
| | | | | | | | This patch includes functions to initialize LAW registers and the chip select 0 of the CPU. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Initial Freescale 85xx Headers.Renaud Barbier2012-05-176-0/+299
These header files are added to provide a minimal support to the Freescale 85xx cpu to boot on a P2020RDB platform. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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