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* Merge branch 'for-next/sandbox' into masterSascha Hauer2020-10-141-13/+1
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| * of: Add common device tree register functionSascha Hauer2020-10-121-13/+1
| | | | | | | | | | | | | | | | The different architectures duplicate some code around unflattening and registering the device tree. Add common functions to reduce this duplication. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | asm/debug_ll_ns16550.h: add divisor parameterduhuanpeng2020-09-291-2/+2
|/ | | | | | | | | | | | add a parameter for the assembly version for passing divisor, and set the default value to DEBUG_LL_UART_ADDR when no parameter is given. Now it is possible to recalculate divisor in runtime to keep the baudrate unchanged. when pll settings changed outside of barebox. e.g. jtag. Signed-off-by: duhuanpeng <u74147@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* kvx,riscv: remove unused $(dtb-y) assignmentMasahiro Yamada2020-08-191-1/+0
| | | | | | | dtb-y is not defined in these Makefiles. Remove the meaningless code. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* riscv: Makefile: make it possible to use riscv64 compilerAntony Pavlov2020-08-101-1/+4
| | | | | | | | | | | | | | | | | | | | At the moment riscv64 toolchain can't be used to build barebox for riscv32, e.g. barebox$ make erizo_generic_defconfig ... barebox$ make ... riscv64-zephyr-elf-ld: common/memory.o: ABI is incompatible with that of the selected emulation: target emulation `elf32-littleriscv' does not match `elf64-littleriscv' The patch fixes the problem by explicit riscv32 target options selection. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Cc: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2020-06-111-40/+2
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| * arch: include <asm-generic/int-ll64.h> from <asm/types.h>Masahiro Yamada2020-05-181-40/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many architectures duplicate the same fixed type definitions as in <asm-generic/int-ll64.h>. Include <asm-generic/int-ll64.h> from <asm/types.h>, and remove the duplicated code. Note: Linux commit 0c79a8e29b5f ("asm/types.h: Remove include/asm-generic/int-l64.h") unified the kernel space definition into int-ll64.h. Barebox also adopts int-ll64. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | kbuild: remove obj-dtb-y, pbl-dtb-y, lwl-dtb-y syntaxMasahiro Yamada2020-05-201-2/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The embedded DTBs are compiled by the chain of pattern rules as follows: %.dts -> %.dtb -> %.dtb.S -> %.dtb.o for barebox proper %.dts -> %.dtb -> %.dtb.S -> %.dtb.pbl.o for pbl Barebox introduced {obj,pbl,lwl}-dtb-y syntax to put the intermediate files into extra-y. The purposes of doing so were: [1] prevent GNU Make from deleting the intermediate files [2] include .*.cmd files In contrast, Linux does not use a special syntax for embedding DTBs into the kernel. For example, as you see in arch/sh/boot/dts/Makefile of Linux 5.6, obj-y += <basename>.dtb.o ... just works. This is because scripts/Kbuild.include specifies .SECONDARY to cater to [1], and scripts/Makefile.build adds the intermediates to 'targets' to deal with [2]. Barebox had already imported the same code from Linux, so you can use obj-y instead of obj-dtb-y, like Linux. pbl-dtb-y and lwl-dtb-y are barebox-specific cases, so I added the %.dtb.pbl.o pattern to intermediate_targets. Going forward, please use obj-y, pbl-y, or lwl-y. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arch: remove KBUILD_SRC checks from arch MakefileMasahiro Yamada2020-05-121-4/+0
| | | | | | | You can always add $(srctree)/ to the mach include path. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* kbuild: prefix compiler flag variables with KBUILD_Masahiro Yamada2020-04-271-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | In old days, Linux also used to use well-known variables such CFLAGS, CPPFLAGS, etc. They were prefixed with KBUILD_ presumably for preventing users from overriding them accidentally. Rename as follows: CFLAGS -> KBUILD_CFLAGS AFLAGS -> KBUILD_AFLAGS CPPFLAGS -> KBUILD_CPPFLAGS LDFLAGS -> KBUILD_LDFLAGS HOSTCFLAGS -> KBUILD_HOSTCFLAGS HOSTCXXFLAGS -> KBUILD_HOSTCXXFLAGS HOSTLDFLAGS -> KBUILD_HOSTLDFLAGS HOST_LOADLIBES -> KBUILD_HOSTLDLIBS HOSTCFLAGS, HOSTCXXFLAGS, HOSTLDFLAGS, HOSTLDLIBS are re-used to allow users to pass-in additional flags to the host compiler. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* riscv: remove meaningless LDFLAGS additionMasahiro Yamada2020-04-271-1/+0
| | | | | | | No one sets ldflags-y. This line is meaningless. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ppc,riscv: set something to KBUILD_DEFCONFIGMasahiro Yamada2020-04-151-0/+2
| | | | | | | | | | | | | | | | | 'make ARCH=riscv defconfig' ends up with endless recursion. Users may get upset with it. In Linux, every architecture does something for 'make defconfig'. Set something to KBUILD_DEFCONFIG to make it work for riscv and ppc. There is only one file in arch/riscv/configs/, so there is no choice but erizo_generic_defconfig for riscv. There are some choices for ppc, but I am not sure what is appropriate. I just picked something. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: unbreak built-in dtbAntony Pavlov2020-02-031-4/+0
| | | | | | | | | | | | | | | | The commit c5d38e92010174 ("lds: Add and use RO_DATA_SECTION macro") consolidates all RO sections link script declaration in the single RO_DATA_SECTION macro. So all all individual RO section declarations have to be removed from per-arch linker scripts. Alas the BAREBOX_CLK_TABLE and the BAREBOX_DTB link script sections were not removed from RISC-V linker script making these sections declared twice. As a result incorrect __clk_of_table_start and __dtb_start addresses are passed to the barebox code therefore the RISC-V barebox is completely unusable. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* lds: Add and use RO_DATA_SECTION macroSascha Hauer2019-10-141-8/+4
| | | | | | | | | We have many different pointer arrays which we put into linker sections and each time there's one added we have to adjust all linker scripts. This adds a common RO_DATA_SECTION define and uses it for all architectures. This makes it easier to add a new linker array. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* lds: Move start/end address variables into definesSascha Hauer2019-10-141-16/+2
| | | | | | | | | | | For the older section defines we specify the start and end addresses outside the macro which means we have to repeat them in each linker script. Make the start/end addresses part of the define to simplify things. While at it, add a BAREBOX_ prefix to the INITCALLS and EXITCALLS macros for consistency to the other defines. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sam Ravnborg <sam@ravnborg.org>
* barebox.lds: Remove unnecessary bracesSascha Hauer2019-10-141-2/+2
| | | | | | | The BAREBOX_CLK_TABLE and BAREBOX_DTB macros are defines that do not take a parameter, so we can remove the braces. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig: retire empty <asm/barebox.h>Ahmad Fatoum2019-08-301-1/+0
| | | | | | | With the latest changes, this file is empty on all archs. Drop it. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* riscv: use generic bitsperlong.hMasahiro Yamada2019-08-121-10/+1
| | | | | | | | | | | | | | | | | Linux highly depends on the fact that the 'long' and the pointer have the same width, and so does barebox. So, we can always use include/asm-generic/bitsperlong.h, which determines BITS_PER_LONG depending on CONFIG_64BIT. This is what Linux does (at least in the kernel-space), and barebox can follow it. Currently, barebox only supports 32-bit riscv, but this should work when it supports 64-bit by adding CONFIG_64BIT to arch/riscv/Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* riscv: dts: erizo-generic: fix memory node nameAntony Pavlov2019-06-041-1/+1
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: surround Kconfig file paths with double quotesMasahiro Yamada2019-03-211-1/+1
| | | | | | | | | Based on Linux commit 8636a1f9677db4f883f29a072f401303acfc2edd This will be needed when you sync Kconfig with Linux 5.0 or later. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* move umode_t typedef from asm/types.h to linux/types.hAntony Pavlov2019-01-181-2/+0
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: add erizo_generic_defconfigAntony Pavlov2019-01-071-0/+51
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: erizo: add nmon image creationAntony Pavlov2019-01-071-0/+11
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: erizo: enable nmonAntony Pavlov2019-01-071-0/+1
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: erizo: add DEBUG_LL supportAntony Pavlov2019-01-072-0/+34
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: add nmon nano-monitorAntony Pavlov2019-01-073-0/+266
| | | | | | | | | | | | | | nmon is a tiny (<1024 bytes) monitor program for the RV32I processors. It can operate with NO working RAM at all! It uses only the processor registers and NS16550-compatible UART port for operation, so it can be used for a memory controller setup code debugging. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: add low-level debug macros for ns16550Antony Pavlov2019-01-071-0/+182
| | | | | | | | | This patch adds macros for ns16550 port initialization and single char output. The macros can be used in MIPS asm pbl code. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* RISC-V: add Erizo SoC supportAntony Pavlov2019-01-077-0/+89
| | | | | | | Erizo is an opensource hardware SoC for FPGA. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add initial RISC-V architecture supportAntony Pavlov2019-01-0727-0/+581
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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