| Commit message (Collapse) | Author | Age | Files | Lines |
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Newer Freescale 3-Stack development systems are equipped
with 64MiB of DDR2 SDRAM, instead of the 128MiB of mDDR SDRAM
with which earlier versions were shipped.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch allows using the i.MX (LCDC) framebuffer driver on boards
using an i.MX21 SoC.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Also, initialize the MMU in a postcore_initcall to enable
it earlier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is a preparation to add second level cache support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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CONFIG_MX35_HCLK_FREQ -> CONFIG_MX25_HCLK_FREQ
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This allows the iomux to reconfigure these pins which are opendrain at
power on and thus can't drive the LCD.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch updates the definitions of the __raw_read and __raw_write
functions so that "sparse" doesn't complain.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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The tags for the command line parameters are not used, so let's remove them:
- CMDLINE_TAG
- SETUP_MEMORY_TAGS
- INITRD_TAG
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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EP93xx: The system controller register definition doesn't take into account a 4
byte gap between ChipId and SysCfg, in consequence all accesses to syscon registers
ahead of ChipId fail. Fix this by inserting a filler field
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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These cache functions have been extracted from
arch/arm/boot/compressed/head.S. The old code only worked
properly on ARMv4. Tested on ARMv4, ARMv5, ARMv6 hardware.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Using these macros simplify the configuration for special GPIO usage. But they
should use correct bit positions for usage in the IOMUX_PAD() macro.
Note: These are the bit positions of the i.MX35 CPU. Not checked for the other
i.MX3x CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ssh://git.pengutronix.de/git/mkl/barebox into next
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Other architectures are supporting the uImage format used by barebox's 'bootm'
command. x86 does'nt. So, we need a special command to be able to boot the
x86 specific bzImage format.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is a low level disk drive communication driver. It uses the real mode
BIOS found on most x86 platforms, to read and write sectors. Used by the
generic disk driver.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This code uses the always (hopefully) existing PIT device to get the time
reference for barebox.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This code adds a generic x86 platform, enabling barebox to act as a
bootloader like 'GRUB'. Very minimalistic, yet. Supports only a serial console
and is tested with QEMU only.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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These functions are special: They are running in the 16 bit real mode world
to bring up barebox on an x86 box.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add some generic functions to make barebox work on x86.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add some generic required code to make barebox work on x86.
Note: Resetting the CPU is unfinished yet. I need some ideas how to reset
this kind of architecture gracefully.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add architecture header files. Some of these files are empty, they only must
exists to make the build system happy.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Adding x86 usage documentation to the tree
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Added support for the following Cirrus Logic EDB93xx boards:
EDB9301
EDB9302
EDB9302A
EDB9307
EDB9307A
EDB93012
EDB9315
EDB9315A
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Added generic GPIO support for EP93xx SoCs
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the Cirrus Logic EP93xx platform
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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