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| * | MIPS: black-swift: pbl: init cacheAntony Pavlov2016-03-091-0/+6
| | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: pbl: import cache init code from U-Boot v2016.01-212-ga3ab2aeAntony Pavlov2016-03-093-0/+170
| | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: probe_scache(): use MIPS_CONF_M linux kernel macroAntony Pavlov2016-03-091-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | We already have MIPS_CONF_M macro in <asm/mipsregs.h> so we have no need in homebrew CONFIG_M macro. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Cc: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: black-swift: pbl: use more lowlevel init code from U-Boot_modAntony Pavlov2016-02-261-1/+3
| | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: tplink-mr3020: pbl: use more lowlevel init code from U-Boot_modAntony Pavlov2016-02-261-1/+3
| | | | | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: ath79: pbl: import hornet_1_1_war routine from U-Boot_modAntony Pavlov2016-02-261-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot_mod is a popular bootloader for Atheros AR93xx chips, please see https://github.com/pepe2k/u-boot_mod for details. It's reasonable to import some lowlevel AR9331 initialization code from U-Boot_mod. AR9331 (Hornet) 1.1 currently needs an additional reset at 1st boot. This patch imports necessary code from u-boot_mod/u-boot/cpu/mips/start_bootstrap.S. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: ath79: pbl: import AR9331 CP0 init routine from U-Boot_modAntony Pavlov2016-02-261-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot_mod is a popular bootloader for Atheros AR93xx chips, please see https://github.com/pepe2k/u-boot_mod for details. It's reasonable to import some lowlevel AR9331 initialization code from U-Boot_mod. This patch imports AR9331 MIPS24K coprocessor0 initialization code from u-boot_mod/u-boot/cpu/mips/start_bootstrap.S. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | MIPS: dts: ar9331.dtsi: fix whitespaceAntony Pavlov2016-02-251-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx'Sascha Hauer2016-03-1112-146/+800
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| * | | ARM: i.MX: karo-tx6: add pr_fmtSascha Hauer2016-03-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add pr_fmt to print tx6 specific messages with a proper prefix. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: karo-tx6: disable power buttonSascha Hauer2016-03-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The power button is not part of the CPU module and can be triggered wrongly on other baseboards. Disable it since we do not need it currently. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: karo-tx6: Setup other PMICsSascha Hauer2016-03-076-130/+509
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TX6 boards come with 3 different PMIC variants from which we currently only support the ltc3673. Detect the other two by i2c address and set them up correctly. The code is based on the karo U-Boot port. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: karo-tx6: Generalize 801x supportSascha Hauer2016-03-023-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree for the 801x variant only contains displays. The displays are not part of the SoM, but instead of the baseboard, so they should be described in a baseboard dts. With this patch we rather include the common tx6x dtsi file and drop 801x from the barebox device tree names. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: karo-tx6: Add support for the i.MX6q 1GiB variantSascha Hauer2016-03-025-1/+209
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX6q variant is basically the same as the i.MX6dl variant, just with another SoC and the usual i.MX6q/i.MX6dl adjustments. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: karo-tx6: Support eMMC board variantsSascha Hauer2016-03-022-1/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TX6 board come with either NAND flash or eMMC as primary storage medium. This adds support for the eMMC variants. We can detect if we have NAND or eMMC by looking at the bootsource which will be configured accordingly. This way we can modify the device tree during runtime and do not have to create a new image. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: karo-tx6: Factor out a common tx6 dtsi fileSascha Hauer2016-03-022-57/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The stuff we currently have in the i.MX6q dts file can be reused for the i.MX6dl variants, so factor out a common dtsi file. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/driver'Sascha Hauer2016-03-1119-58/+100
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| * | | | driver: replace dev_request_mem_region with dev_request_mem_resourceSascha Hauer2016-03-0719-58/+100
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_request_mem_region doesn't work properly one some SoCs on which PTR_ERR() values clash with valid return values from dev_request_mem_region. Replace them with dev_request_mem_resource where possible. This patch has been generated with the following semantic patch: // <smpl> @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { ... - return PTR_ERR(io); -} + return PTR_ERR(iores); +} +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) - return PTR_ERR(io); -} + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { - ret = PTR_ERR(io); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { + ret = PTR_ERR(iores); ... } +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ identifier func; @@ func(...) { <+... struct resource *iores; -struct resource *iores; ...+> } // </smpl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/caam'Sascha Hauer2016-03-111-0/+4
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| * | | | ARM: imx6: add caam clksSteffen Trumtrar2016-02-121-0/+4
| | |_|/ | |/| | | | | | | | | | | | | | Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/arm'Sascha Hauer2016-03-1122-4/+1932
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| * | | | ARM: tegra: use dynamic malloc area sizeLucas Stach2016-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the fixed malloc area size from the defconfig and allow barebox to calculate the size dynamically. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: tegra: beaver: add missing serial aliasLucas Stach2016-03-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upstream has dropped those from the base dtsi, as long as we can't fully switch to the upstream board DT add the correct alias to the barebox copy. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | Terasic DE0-Nano-SoC: add supportTim Sander2016-03-0119-2/+1929
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v7: eof whitespace fixes A Patch for supporting the Terasic DE0 NANO-SoC with barebox. The pretty similar Socrates Board was taken as a starting point with pulling in the memory timings/pinmux from http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign Signed-off-by: Tim Sander <tim@krieglstein.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: socfpga: terasic sockit: Make locally used sys_mgr_init_table staticSascha Hauer2016-02-181-1/+1
| | |/ / | |/| | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/am335x'Sascha Hauer2016-03-119-15/+63
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| * | | | ARM: AM335x: Make use of ARM_USE_COMPRESSED_DTBTeresa Remmet2016-02-174-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ARM_USE_COMPRESSED_DTB for all AM335x based board, to reduce the image size even more. Saves about 9kB in MLO image and 20kB in barebox image. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: dts: beaglebone: Strip clocks in MLO device treeTeresa Remmet2016-02-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce even more size of beaglebone MLO device tree with stripping the clocks. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: boards: phytec-som-am335x: New RAM Timings for phyCORE-AM335x-R2Teresa Remmet2016-02-172-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add RAM timings for phyCORE-AM335x-R2 256MB RAM. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: board: phytec-som-am335x: RAM timings for phyCORE-AM335x-R2Arnd Beuscher2016-02-172-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add RAM Timings for new phyCORE-AM335x-R2 SoM with 512MB (MT41K256M16TW107IT). Signed-off-by: Arnd Beuscher <a.beuscher@phytec.de> Sigend-off-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: dts: am335x-phytec: eeprom nameJan Remmet2016-02-172-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use eeprom as name like in the kernel. This is needed if you use the state framework. phycard: also fix index, it has address 0x54 Signed-off-by: Jan Remmet <j.remmet@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: am335x_defconfig: Enable watchdog supportTeresa Remmet2016-02-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable wdt driver and command. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: am335x_defconfig: Enable NANDTEST commandWadim Egorov2016-02-171-0/+1
| |/ / / | | | | | | | | | | | | | | | | Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | arm/cpu/lowlevel: fix: possible processor mode changeAlexander Kurz2016-03-041-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a re-application of fix 17644b55. arm_cpu_lowlevel_init() will set the processor mode to 0x13 (supervisor). When this function is entered via a different processor mode, register banking will happen to lr (r14), resulting in an invalid return address. This fix will preserve the return address manually. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | efi: fix memory leak in error pathLucas Stach2016-03-041-1/+3
| |_|/ |/| | | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: i.MX53-qsb: Fix gpio button polaritySascha Hauer2016-03-011-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since 253fb33 (input: gpio-keys: convert to input framework) the gpio-buttons are registered with the input framework which has the side effect that they are activated during boot and no longer have to be activated manually by activating the input device console. This reveals that the gpio-button polarities are wrong: The autoboot is no longer running through since a gpio button press is wrongly detected. Fix the polarities in the barebox dts for now to get back a working board. A proper fix has been sent upstream to the kernel. Once this has landed and propagated back to barebox this patch can be reverted. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | arm: bootm: be more clever about kernel spacingLucas Stach2016-03-011-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the kernel load address is chosen by the user/image we need to check if the kernel needs to relocate itself before decompression. If that's the case the spacing behind the kernel must allow for this relocation without overwriting anything placed behind the kernel. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | arm: bootm: unify kernel load address calculationLucas Stach2016-03-011-37/+37
|/ / | | | | | | | | | | | | | | | | Instead of having the same logic for uImage and zImage types duplicated in the code, split it out into a separate function. This does not change the behavior of the calculation. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: imx6: physom: fix phyflex workaround on Dual and SoloStefan Christ2016-02-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 764ae1647cafa ("ARM: i.MX: Add correct SoC type detection for i.MX6") the definition of the function cpu_is_mx6q and cpu_is_mx6dl has changed. Before that change they match the SoM family Quad/Dual and DualLite/Solo. After that change they are SoM specific. They match only Quad and DualLite. There are extra functions cpu_is_mx6d and cpu_is_mx6s for SoM Dual and Solo. We have not seen any real world consequences of this problem yet. Signed-off-by: Stefan Christ <s.christ@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: imx: clocksource: add new DT compatibleStefan Christ2016-02-171-0/+3
| | | | | | | | | | | | | | | | | | | | Since commit 0ff58575c9d66 ("dts: update to v4.5-rc1") the compatible "fsl,imx6q-gpt" was removed from imx6dl.dtsi. Now there is only the Solo/DualLite specific compatible "fsl,imx6dl-gpt". Adapt the driver for that change. Signed-off-by: Stefan Christ <s.christ@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX6: add function cpu_is_mx6s()Stefan Christ2016-02-171-0/+1
|/ | | | | | | | The cpu_is_mx6* function for the i.MX6 Solo was missing. All other functions are already defined. Signed-off-by: Stefan Christ <s.christ@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/regmap'Sascha Hauer2016-02-082-179/+169
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| * ARM: i.MX: ocotp: Switch to regmap supportSascha Hauer2016-02-051-89/+56
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: ocotp: Fix error bit handlingSascha Hauer2016-02-051-13/+10
| | | | | | | | | | | | | | | | | | Instead of returning an error when a locked region is read, fill the result with 0xbadabada to indicate a locked region is read. This way a md -s /dev/imx-ocotp does not abort when it encounters locked regions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: ocotp: make priv the first argument of functionsSascha Hauer2016-02-051-16/+16
| | | | | | | | | | | | | | Throughout our codebase the private context pointer is the first argument to a function. Do this for the ocotp driver aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: ocotp: Explicitly access control registerSascha Hauer2016-02-051-7/+8
| | | | | | | | | | | | | | | | Even when the control register has offset 0x0 it's still nice to use a register define for it. Accessing priv->base directly just looks wrong. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: ocotp: Fix fusebox sizeSascha Hauer2016-02-051-1/+23
| | | | | | | | | | | | | | All i.MX6 SoCs except the i.MX6SL have 4kbit fuses. The i.MX6SL has 2kbit fuses. Fix the device size accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: iim: Switch to regmap supportSascha Hauer2016-02-051-59/+62
| | | | | | | | | | | | To provide consumers easier access to the IIM. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/linux-headers'Sascha Hauer2016-02-082-0/+4
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| * | x86: Add missing typedef for umode_tSascha Hauer2016-02-011-0/+2
| | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-26 05:52:53 +0000