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* Merge branch 'for-next/vpl'Sascha Hauer2015-08-072-44/+89
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| * ARM: i.MX51 Efikasb: update device treeSascha Hauer2015-07-131-41/+87
| | | | | | | | | | | | | | Use the correct display pins (which are DISP2* and not DISP1*) and use the of_graph bindings to describe the video hardware. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX51 Efikasb: make more space for bareboxSascha Hauer2015-07-131-1/+1
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX51 Efikasb: Disable backlight earlierSascha Hauer2015-07-131-2/+1
| | | | | | | | | | | | | | | | Set the backlight enable gpio to disabled earlier during startup to avoid flicker when the pinmux is configured but not yet the enable gpio. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/vincell'Sascha Hauer2015-08-0711-360/+1226
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| * | ARM: vincell: move to DT probingSteffen Trumtrar2015-07-1310-360/+1208
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enabled multi image support for the Garz&Fricke Vincell board. Also it adds the Vincell-LT as a second image with a separate device tree. Previously we used the same image on both the Vincell and the Vincell-LT image since the differences are not that significant for barebox. Still this was good for quite some confusion internally, so let's properly introduce a second image. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: i.MX: Add i.MX5 debug functionsSascha Hauer2015-07-131-0/+16
| |/ | | | | | | | | | | | | We recently introduced ungate_all_peripherals and SoC specific low level UART init functions. Add some more for i.MX5 SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/video'Sascha Hauer2015-08-064-9/+4
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| * | video: stm: code buswidth in platform data as decimalSascha Hauer2015-07-064-9/+4
| |/ | | | | | | | | | | | | | | | | Instead of putting hardware specific bit masks in platform_data just use the decimal interface width and encode this in the driver. This makes it easier to create the platform_data and helps device tree based implementations. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/spd'Sascha Hauer2015-08-062-5/+2
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| * | common: move DDR_SPD to common/KconfigAlexander Smirnov2015-07-062-5/+2
| |/ | | | | | | | | | | | | | | This patch makes it possible to use ddr_spd-related routines in any arch not only in ppc. Signed-off-by: Alexander Smirnov <alllecs@yandex.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/ppc'Sascha Hauer2015-08-068-14/+150
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| * | PPC/PCM030: provide EEPROM support to read factory settingsJuergen Borleis2015-08-034-1/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | Above the 0x800 offset the manufacturer provides the board type, a serial number and the MAC as three simple strings. Extract these strings, provide their value as global variables and set the MAC into the ethernet unit. Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | PPC/MPC5200: re-use the IMX I2C master driver for MPC5200Juergen Borleis2015-08-031-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | This IP core is shared between many FSL SoCs. The MPC5200 provides this core as well. Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | PPC/MPC52xx: unify header file name for clock APIJuergen Borleis2015-08-033-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | In preparation to re-use the i.MX I2C driver for the MPC5200 SoC use clock.h instead of clocks.h for the clock API. Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | PPC/PCM030: enable USB/OHCI pin supportJuergen Borleis2015-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This change in the port config register enables the USB/OHCI support and makes USB work on the PCM030's regular development baseboard. Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | PPC/PCM030: fix reference clockJuergen Borleis2015-08-032-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enable and use USB/OHCI on the MPC5200 the USB PLL register must be set. It's not easy to find a correct value for this register, it seems it depends on the used external reference frequency and some other 'magic' things. There are some values out in the wild for the 33,333333 MHz and 33,333000 MHz reference frequency case, but they are not consistent over the boards. The value used here in this change for the USB PLL register is from the first days of support for this platform and works at least on the reference baseboard. Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | PPC/PCM030: remove nowhere used definitionsJuergen Borleis2015-08-031-9/+0
| | | | | | | | | | | | | | | Signed-off-by: Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2015-08-0611-16/+103
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| * | | ARM: don't allow Thumb2 on AT91Lucas Stach2015-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AT91 has a custom barebox head that doesn't support Thumb2. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: rockchip: depend on OFTREELucas Stach2015-07-242-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current supported Rockchip board is initialized from a builtin DTB and I suppose all future boards will do the same. Fixes various missing functions and prototypes in Rockchip clk driver. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: pxa: move mainstone TEXTBASE to KconfigLucas Stach2015-07-242-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So we can drop it from the defconfig and stop bothering the user with this choice by default. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX6: clarify usage of /dev/imx-ocotpStefan Christ2015-07-201-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Explain the relationship between the OCOTP addresses from the i.MX6 Reference Manual and the file offset in '/dev/imx-ocotp'. Signed-off-by: Stefan Christ <s.christ@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | sandbox: Update defconfigSascha Hauer2015-07-201-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The sandbox defconfig hasn't been updated for a long time. This enables tons of features since the binary size is not relevant at all for sandbox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: AM335x: dts: Fix wrong GPMC size mapping for omapsDaniel Schultz2015-07-163-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch is based on Linux upstream patch: commit e2c5eb78a3cc9b0d69ae924c33da50a4cd6d1fa4 Author: Tony Lindgren <tony@atomide.com> The GPMC binding is obviously very confusing as the values are all over the place. People seem to confuse the GPMC partition size for the chip select, and the device IO size within the GPMC partition easily. The ranges entry contains the GPMC partition size. And the reg entry contains the size of the IO registers of the device connected to the GPMC. Let's fix the issue according to the following table: Device GPMC partition size Device IO size connected in the ranges entry in the reg entry NAND 0x01000000 (16MB) 4 16550 0x01000000 (16MB) 8 smc91x 0x01000000 (16MB) 0xf smc911x 0x01000000 (16MB) 0xff OneNAND 0x01000000 (16MB) 0x20000 (128KB) 16MB NOR 0x01000000 (16MB) 0x01000000 (16MB) 32MB NOR 0x02000000 (32MB) 0x02000000 (32MB) 64MB NOR 0x04000000 (64MB) 0x04000000 (64MB) 128MB NOR 0x08000000 (128MB) 0x08000000 (128MB) 256MB NOR 0x10000000 (256MB) 0x10000000 (256MB) Let's also add comments to the fixed entries while at it. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: am33xx: netboot use ramfsJan Remmet2015-07-082-4/+27
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | Older tftp server don't send the file size. Then tftpfs needs temporary place to store the file. mount ramfs and then tftpfs in a own mount point Signed-off-by: Jan Remmet <j.remmet@phytec.de> Tested-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx'Sascha Hauer2015-08-0659-108/+2402
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| * | | ARM: [phyFLEX,phyCARD]-i.MX6: rename define in flash-headersStefan Christ2015-07-3112-13/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The files flash-header-*.imxfg contains two defines which are use in include files flash-header-phytec-*.h. The first define is SETUP_MDCFG0. In the second define name some RAM size value were used, e.g. SETUP_S_DL_512MB_1GB or SETUP_1GIB_2GIB_4GIB. It's better to name also the second define after the register names, here MMDC1_MDCTL and MMDC1_MDASP, because these values changes for every RAM configurations and it's consistent with the first define. Signed-off-by: Stefan Christ <s.christ@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: imx6: rename SPI NOR device to /dev/spinor0Philipp Zabel2015-07-312-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Barebox currently names the SPI NOR device "/dev/sst25vf016b", but the barebox update handler still points to "/dev/m25p80", causing barebox_update to fail. Choose a descriptive name instead. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX6 cm-fx6: Fix area for get_ram_sizeSascha Hauer2015-07-311-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for bank2_size get_ram_size must be called with the CS1 area. With the recent fix to calculate CS1 start this now starts at 0x90000000 and no longer at 0x80000000. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX6 cm-fx6: Fix Chip density for DDR_64BIT_2GB caseSascha Hauer2015-07-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | DDR_64BIT_2GB corresponds to two chip selects (ncs = 2) with 1GiB each. In this case cs_density must be configured to 8Gb (1GiB). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: imx6-mmdc: Fix cs0_end calculationSascha Hauer2015-07-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current calculation does not take the 0x10000000 offset where SDRAM starts into account. For example with a 1GiB chip density the current code calculates cs1 start to 0x40000000, but it has to be 0x10000000 + 0x40000000 = 0x50000000. Add the missing 8 32MiB chunks. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: initial cm-fx6 supportSascha Hauer2015-07-3112-0/+1032
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cm-fx6 board is a module from Compulab with different i.MX6 SoCs. This module is also found in the Utilite Mini Computer this patch also adds support for. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: make early UART functions independent of DEBUG_LLSascha Hauer2015-07-311-40/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have functions to setup the i.MX uart for early use, but these all depend on DEBUG_LL. Move them to imx-uart.h to make them usable for the regular PBL console. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: xload: implement esdhc xload for i.MX6Sascha Hauer2015-07-313-1/+277
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX6: Add DDR setup code from U-BootSascha Hauer2015-07-292-0/+818
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several i.MX6 boards like to do their SDRAM setup in code rather than in DCD tables. Add the SDRAM setup code from U-Boot to make it easy to adopt the SDRAM setup from the U-Boot port of these boards. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: Add SPI xload codeSascha Hauer2015-07-294-0/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PBL xload code to load an image from SPI NOR flash. Currently implemented for i.MX6. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX6: create cpu_is() functions for use in PBLSascha Hauer2015-07-161-24/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current cpu_is_mx6x() functions need the imx6_cpu_type variable which make them unsuitable for PBL. Add a set of cpu_mx6_is_mx6x() functions which can be called from PBL aswell. Unlike the cpu_is_mx6x() functions the cpu_mx6_is_mx6x() functions assume that they are called on i.MX6 only. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: compile boot.c for pbl aswellSascha Hauer2015-07-161-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As boot.c now contains code for the pbl compile compile it there awell. While at it move esdctl.c to obj-pbl-y. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX6: add function to get bootsource in pblSascha Hauer2015-07-162-16/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the pbl the regular bootsource_get cannot be used. Add a function which returns the bootsource directly with values from the hardware. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX6: remove unnecessary includesSascha Hauer2015-07-168-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Most files including imx6-mmdc.h do not actually use anything from it. Clean this up. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX6: Add i.MX6 entry functionSascha Hauer2015-07-162-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a i.MX6 specific entry function which automatically detects the SDRAM size. The prototype has already been present, but it was never implemented. Rename it to imx6q_ since the other variants need other functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: imx6: do not include arm/imx6q.dtsi from barebox imx6q.dtsiPhilipp Zabel2015-07-0813-1/+12
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead, let each board dts file that needs it include <arm/imx6q.dtsi> manually before "imx6q.dtsi". This way board dts files that include the original board dts and include "imxq6.dtsi" on top of that without disabling all peripherals. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/exitcall'Sascha Hauer2015-08-0618-19/+60
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| * | | exitcall: move board_shutdown to exitcall infrastructureHerve Codina2015-07-131-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Herve Codina <Herve.CODINA@celad.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | exitcall: move arch_shutdown to exitcall infrastructureHerve Codina2015-07-136-17/+8
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Herve Codina <Herve.CODINA@celad.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | exitcall: Add exitcall infrastructureHerve Codina2015-07-1311-1/+51
| |/ / | | | | | | | | | | | | | | | | | | | | | exitcall infrastructure is based on initcall infrastructure. It allows to have and use exit call hooks on barebox shutdown. Signed-off-by: Herve Codina <Herve.CODINA@celad.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/efi'Sascha Hauer2015-08-065-20/+259
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| * | | efi: enable blspec in the defconfigMichael Olbrich2015-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | efi: use an EFI variable to save the environmentMichael Olbrich2015-07-271-0/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>