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* MIPS: loongson-ls1b: add NMON supportAntony Pavlov2014-01-302-0/+4
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: loongson-ls1b: add PBL supportAntony Pavlov2014-01-302-0/+40
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: loongson-ls1b: add ns16550-based consoleAntony Pavlov2014-01-303-0/+24
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: loongson-ls1b: add DEBUG_LL supportAntony Pavlov2014-01-302-0/+35
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: mach-loongson: add DEBUG_LL supportAntony Pavlov2014-01-301-0/+27
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: mach-loongson: add loongson-ls1b boardAntony Pavlov2014-01-304-0/+26
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add initial Loongson-1X SoC stuffAntony Pavlov2014-01-303-0/+60
| | | | | | This code is based on linux-3.6 code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add Loongson-1B processor constants and CPU probeAntony Pavlov2014-01-212-0/+48
| | | | | | | | | | | | | | | | | | | | | | This commit is based on this linux commit: commit 2fa36399e63c911134f28b6878aada9b395c4209 Author: Kelvin Cheung <keguang.zhang@gmail.com> Date: Wed Jun 20 20:05:32 2012 +0100 MIPS: Add CPU support for Loongson1B Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add Loongson-1B CPU Kbuild stuffAntony Pavlov2014-01-212-0/+20
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add initial Loongson-family documentationAntony Pavlov2014-01-212-0/+9
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: add initial Loongson-based boards supportAntony Pavlov2014-01-213-0/+13
| | | | | | | | | | | Loongson (simplified Chinese: 龙芯; pinyin: Lóngxīn; literally: "Dragon Core") is a family of general-purpose MIPS CPUs developed at the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS) in the People's Republic of China. See http://en.wikipedia.org/wiki/Loongson for details. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/video'Sascha Hauer2014-01-071-0/+22
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| * video: imx-ipu-fb: Allow to specify framebuffer memory size via platform_dataSascha Hauer2013-12-201-0/+2
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * video: ipufb: Allow to disable fractional pixelclock dividerSascha Hauer2013-12-201-0/+5
| | | | | | | | | | | | | | | | The IPU has a fractional pixelclock divider. When used, this produces clock jitter which especially LVDS transceivers can't handle. Allow to disable it via platform_data. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * video: ipufb: make disp_data_fmt configurableSascha Hauer2013-12-181-0/+15
| | | | | | | | | | | | | | | | With the IPU the way the display is connected is completely independent of the framebuffer pixel format. So instead of specifying a pixel width in platform_data we have to specify how the display is connected. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/socfpga'Sascha Hauer2014-01-073-218/+223
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| * | ARM: socfpga: sockit: reconfigure src for sdmmcSteffen Trumtrar2013-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | Update to Quartus v13.1 autogenerated version. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: socfpga: update iocsr configSteffen Trumtrar2013-12-101-209/+209
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the IO configuration to the Quartus v13.1 version. This seems to fix a stability issue under the linux kernel when started with barebox. As this is undocumented, autogenerated stuff, one can not be sure what it really does nor if it really fixes the problem or just relocates it. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: socfpga: sockit: update sdram configSteffen Trumtrar2013-12-101-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | This updates/changes the sdram config for the sockit to the quartus v13.1 autogenerated version. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/openrisc'Sascha Hauer2014-01-073-0/+15
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| * | | openrisc: enable OpenCores ethernet driverBeniamino Galvani2013-12-173-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OpenCores 10/100 Mbps ethernet MAC is often available on OpenRISC-based SoCs and is supported by the OpenRISC architectural simulator (or1ksim) as well. The patch enables the driver on the 'generic' openrisc board. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/imx'Sascha Hauer2014-01-073-320/+8
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| * | | | ARM: i.MX6: tqma6x: dts: remove unused dts fileRobert Schwebel2013-12-091-319/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DTS file for MBa6x is imx6q-mba6x.dts, so it looks like this file doesn't make any sense. Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: i.MX6: tqma6x: dts: get MAC address from OCOTPRobert Schwebel2013-12-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | ARM: i.MX6: tqma6x: dts: move FEC enablement to baseboardRobert Schwebel2013-12-092-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definition if the FEC is used is made by the baseboard (MBa6x), not by the module (TQMa6x). Move it there. Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | Merge branch 'for-next/arm-barebox-bootm'Sascha Hauer2014-01-0782-100/+37
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| * | | | | ARM: boot barebox with kernel calling conventionSascha Hauer2014-01-062-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start a 2nd stage barebox with the Linux Kernel calling convention. Right now barebox does not interpret ATAGs or devicetree passed to it, but it doesn't hurt to pass parameters so that future bareboxes can use them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: remove armlinux_set_bootparams() calls from boardsSascha Hauer2014-01-0680-89/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the place for the atags now is determined automatically the call from the boards can be removed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | ARM: start kernel: find a valid address for the atags list automaticallySascha Hauer2014-01-061-7/+20
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a board does not specify a place for the atags list default to SDRAM start + 0x100. The vast majority of boards uses this place anyway, so the call to armlinux_set_bootparams() can be removed for most boards. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | mips asm/types.h: add #ifndef to fix compile errorDu Huanpeng2014-01-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | without "#ifndef __ASSEMBLY__ #endif", an assembly file including this file will break compilation. Signed-off-by: Du Huanpeng <u74147@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | | ARM: i.MX: bbu external nand: Fix uninitialized variableSascha Hauer2013-12-181-1/+1
| |/ / / |/| | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: OMAP: early call am33xx_register_ethaddrJan Weitzel2013-12-122-4/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | am33xx_register_ethaddr must be called before cpsw driver start. Move it from devices_initcall to coredevice_initcall. Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | pcm051: ethernet and dts fixesJan Weitzel2013-12-122-14/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add compatible phytec,pcm051 clean up pinmux_emac_rmii1_pins introduce davinci_mdio_default pin group set AM33XX_MAC_MII_SEL via dts rmii-clock-ext use bch8 as ecc mode add pagesize to 24c32@52 Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: solidrun-carrier-1: Fix wrong ENTRY_FUNCTIONSascha Hauer2013-12-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | ENTRY_FUNCTION was changed, fix compilation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: OMAP: consolidate am335x mlo defconfigsSascha Hauer2013-12-102-36/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Beaglebone and the AM335x Phytec phyCORE can be compiled together, so merge the configs into a am335x_mlo_defconfig. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: OMAP: introduce multiboard support and move am33xx boards to itSascha Hauer2013-12-105-15/+25
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: beaglebone: configure console from devicetreeSascha Hauer2013-12-102-1/+5
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: am335x Phytec phyCORE: configure environment from devicetreeSascha Hauer2013-12-102-16/+19
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: OMAP: Safe boot info in fixed SRAM addressSascha Hauer2013-12-1013-41/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Storing the boot information in the image itself and passing a pointer around between images is cumbersome and doesn't fit well with multiimage support where the pointer we pass around is already occupied by the devicetree. Do the same as U-Boot does and store the boot information at the bottom of the SRAM public stack. To maintain the compatibility between new xloaders and older barebox binaries we still pass the boot information to the next stage via pointer. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: am335x Phytec phyCORE: Move partition descriptions to devicetreeSascha Hauer2013-12-103-25/+57
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: beaglebone: Switch to devicetree and multiimageSascha Hauer2013-12-107-137/+77
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: beaglebone: Add memory to devicetreesSascha Hauer2013-12-103-3/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | barebox needs it to initialize the memory. While at it, give the beabglebone black another name than the original beaglebone has. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: am33xx: beaglebone: remove mlo_large_defconfigSascha Hauer2013-12-102-55/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As with devicetree support the binary will get too large for the SRAM drop the configuration. It was mainly meant for debugging purposes anyway. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: dts: Add am33xx beaglebone(black) dts filesSascha Hauer2013-12-105-0/+464
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: am33xx Phytec phyCORE: update defconfigSascha Hauer2013-12-101-0/+11
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: am33xx Phytec phyCORE: Switch to multiimage supportSascha Hauer2013-12-105-17/+39
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: am33xx Phytec phyCORE: initialize debug UARTSascha Hauer2013-12-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add debug UART initialization to lowlevel init and print a '>'. Helps debugging lowlevel code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: am335x phytec phyCORE: Switch to devicetree probe supportSascha Hauer2013-12-106-222/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This switches the am335x Phytec phyCORE to devicetree probe support. For now we use a linked in dtb. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: Add base am335x-phytec-phycore devicetree fileSascha Hauer2013-12-102-0/+235
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: Make ENTRY_FUNCTION more robustSascha Hauer2013-12-1016-61/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An entry function should begin with a exception header. For this to work properly the entry function should not contain any code which gcc might put before the header. To make this sure change the ENTRY_FUNCTION macro so that it generates one function which only contains the exception header and a second function which contains the original body of the entry function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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