| Commit message (Collapse) | Author | Age | Files | Lines |
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As barebox has become the true SPL of mioa701 board (no intermediate
SPL), a bug was uncovered in the init procedure, where the CPU voltage
was to be increased by commanding the I2C voltage regulator, while the
I2C was shut down.
Fix it by unclock-gating the power I2C bus before using it.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The IPU has a fractional pixelclock divider. When used, this produces
clock jitter which especially LVDS transceivers can't handle. Allow
to disable it via platform_data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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With the IPU the way the display is connected is completely independent
of the framebuffer pixel format. So instead of specifying a pixel width
in platform_data we have to specify how the display is connected.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Update to Quartus v13.1 autogenerated version.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Update the IO configuration to the Quartus v13.1 version. This seems to fix a
stability issue under the linux kernel when started with barebox.
As this is undocumented, autogenerated stuff, one can not be sure what it really
does nor if it really fixes the problem or just relocates it.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This updates/changes the sdram config for the sockit to the quartus v13.1
autogenerated version.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The OpenCores 10/100 Mbps ethernet MAC is often available on
OpenRISC-based SoCs and is supported by the OpenRISC architectural
simulator (or1ksim) as well.
The patch enables the driver on the 'generic' openrisc board.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The DTS file for MBa6x is imx6q-mba6x.dts, so it looks like this file
doesn't make any sense.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The definition if the FEC is used is made by the baseboard (MBa6x), not
by the module (TQMa6x). Move it there.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Start a 2nd stage barebox with the Linux Kernel calling convention.
Right now barebox does not interpret ATAGs or devicetree passed
to it, but it doesn't hurt to pass parameters so that future bareboxes
can use them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As the place for the atags now is determined automatically the call
from the boards can be removed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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If a board does not specify a place for the atags list default to
SDRAM start + 0x100. The vast majority of boards uses this place
anyway, so the call to armlinux_set_bootparams() can be removed
for most boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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without "#ifndef __ASSEMBLY__ #endif", an assembly file
including this file will break compilation.
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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am33xx_register_ethaddr must be called before cpsw driver start.
Move it from devices_initcall to coredevice_initcall.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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add compatible phytec,pcm051
clean up pinmux_emac_rmii1_pins
introduce davinci_mdio_default pin group
set AM33XX_MAC_MII_SEL via dts rmii-clock-ext
use bch8 as ecc mode
add pagesize to 24c32@52
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ENTRY_FUNCTION was changed, fix compilation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Beaglebone and the AM335x Phytec phyCORE can be compiled
together, so merge the configs into a am335x_mlo_defconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Storing the boot information in the image itself and passing a pointer
around between images is cumbersome and doesn't fit well with multiimage
support where the pointer we pass around is already occupied by the
devicetree.
Do the same as U-Boot does and store the boot information at the bottom
of the SRAM public stack.
To maintain the compatibility between new xloaders and older barebox
binaries we still pass the boot information to the next stage via pointer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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barebox needs it to initialize the memory. While at it, give the
beabglebone black another name than the original beaglebone has.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As with devicetree support the binary will get too large for the
SRAM drop the configuration. It was mainly meant for debugging purposes
anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add debug UART initialization to lowlevel init and print a '>'. Helps
debugging lowlevel code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This switches the am335x Phytec phyCORE to devicetree probe support.
For now we use a linked in dtb.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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An entry function should begin with a exception header. For this to work
properly the entry function should not contain any code which gcc might
put before the header. To make this sure change the ENTRY_FUNCTION macro
so that it generates one function which only contains the exception header
and a second function which contains the original body of the entry function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The multi image startup process used to have three binaries involved:
- The lowlevel board code to initialize SDRAM
- the uncompressor
- the regular (compressed) barebox binary
Drop the uncompressor and put the uncompress code into the lowlevel
board code binary. This makes the startup process easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Due to unwind tables being generated by recent versions of gcc by
default, the x86 Barebox link fails with:
ld: section .eh_frame loaded at [00000000000197c4,000000000001f31f]
overlaps section .barebox_initcalls loaded at [00000000000197c4,0000000000019833]
Passing -fno-unwind-tables -fno-asynchronous-unwind-tables avoids this
problem.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Running at 1GHz, rather than 13MHz certainly makes things a bit faster.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We run the system bus from the OSC clock during init, to avoid crashing
the system while reconfiguring the PLLs.
Switch to a more reasonable clock when we are done with this.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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