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* ARM Ka-Ro TX25: fix compilation with external NAND boot enabledSascha Hauer2013-01-181-2/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM Ka-Ro TX25: fix running in SDRAM testSascha Hauer2013-01-181-1/+1
| | | | | | | The end of SDRAM is at 0x9fffffff, not at 0x8fffffff. This fixes starting barebox when it is located in the second SDRAM bank. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX25: Add missing device registration for the iomuxSascha Hauer2013-01-181-0/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'delivery/at91_fixes' of git://git.jcrosoft.org/bareboxSascha Hauer2013-01-152-3/+4
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| * at91sam9g45: fix i2c typosJean-Christophe PLAGNIOL-VILLARD2013-01-151-3/+3
| | | | | | | | | | | | | | | | | | | | arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_i2c': arch/arm/mach-at91/at91sam9g45_devices.c:158:42: error: 'pdata_i2c' undeclared (first use in this function) arch/arm/mach-at91/at91sam9g45_devices.c:158:42: note: each undeclared identifier is reported only once for each function it appears in arch/arm/mach-at91/at91sam9g45_devices.c:163:8: error: expected ':' or '...' before ';' token arch/arm/mach-at91/at91sam9g45_devices.c:166:8: error: expected ':' or '...' before ';' token Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * at91: sam9x5ek: use -EINVAL for invalid gpio on 1-wireJean-Christophe PLAGNIOL-VILLARD2013-01-151-0/+1
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | ARM panda: do not set gpio direction of heartbeat LEDSascha Hauer2013-01-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | We now have gpio_request. When we call gpio_direction_output before registering a led_gpio the gpio will be implicitely requested by the gpio core. gpio_request in the led core will then fail resulting in an unregistered LED. Fix this by removing the call to gpio_direction_output. The LED core will do this anyway. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | arm-mmu: remove semicolon in arm mmu.cAlexander Aring2013-01-141-1/+1
| | | | | | | | | | | | | | Remove semicolon in PAGE_ALIGN macro. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM am33xx: the hsmmc is a omap4 type mmc controllerSascha Hauer2013-01-101-1/+1
|/ | | | | | | The am33xx hsmmc controller is actually a omap4 type controller which means that it has a 0x100 offset in the registers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/omap'Sascha Hauer2013-01-0961-515/+2798
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| * ARM omap / mci: Fix register offsetsSascha Hauer2013-01-085-19/+18
| | | | | | | | | | | | | | | | Only the OMAP4 has a register offset of 0x100 in the register space. Fix this by using the device id mechanism. This became broken when the device register convenience functions were introduced. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * pcm051: Add inital supportTeresa Gámez2012-12-218-0/+185
| | | | | | | | | | | | | | Added initial support for Phytec phyCORE-AM335x. Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM OMAP: Apply EHCI device register functionsTeresa Gámez2012-12-212-4/+2
| | | | | | | | | | Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM OMAP: Add EHCI to device register functionsTeresa Gámez2012-12-212-0/+12
| | | | | | | | | | Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM OMAP: Apply RAM device register functions to boardsTeresa Gámez2012-12-219-15/+14
| | | | | | | | | | | | | | Apply RAM and SRAM register functions to all OMAP boards. Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM OMAP: Add SRAM and DRAM to device register functionsTeresa Gámez2012-12-215-0/+29
| | | | | | | | | | Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM AM33XX: Add mmc0 pin mux functionTeresa Gámez2012-12-212-0/+6
| | | | | | | | | | Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: beaglebone: add first-stage support for AM335x and boardJan Luebbe2012-12-2022-2/+1770
| | | | | | | | | | Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM AM33XX: Add MMC BasesTeresa Gámez2012-12-201-0/+2
| | | | | | | | | | Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM OMAP4: Add EHCI base defineTeresa Gámez2012-12-201-0/+3
| | | | | | | | | | Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM OMAP4: Add SRAM base defineTeresa Gámez2012-12-201-0/+2
| | | | | | | | | | Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * arm: omap: am33xx: add support for low level debugJan Luebbe2012-12-201-0/+5
| | | | | | | | | | Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM OMAP AM33XX: create new ARCH for AM33xxTeresa Gámez2012-12-206-0/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Created ARCH for AM33xx boards as second stage bootloader. This includes: - Added dmtimer0 - Created basic header files - Added MMC support for ARCH_AM33XX - Added reset function Signed-off-by: Teresa Gámez <t.gamez@phytec.de> Some header file cleanup by: Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap3: Add change OMAP_ prefix to OMAP3_ for registersSascha Hauer2012-12-2013-295/+295
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap hsmmc: Fix register offsetSascha Hauer2012-12-192-8/+8
| | | | | | | | | | | | | | | | | | The hsmmc module has a 0x100 offset in its register space. The real register space size for the module is 4K, so when we register the device with the size 4k, we have to account for the offset in the driver, not in the resource allocation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap4: Use device register functions in boardsSascha Hauer2012-12-194-51/+17
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap3: Use device register functions in boardsSascha Hauer2012-12-194-49/+16
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap: Add device register convenience functionsSascha Hauer2012-12-195-2/+165
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap: include individual SoC filesSascha Hauer2012-12-1917-54/+19
| | | | | | | | | | | | | | - remove mach/silicon.h and include omap?-silicon.h directly - include mach/omap?-clock.h directly where needed Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap: Use SoC specific defines for gpmc and timer baseSascha Hauer2012-12-195-9/+22
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap3: make PRM defines SoC specificSascha Hauer2012-12-192-3/+2
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap4: make PRM defines SoC specificSascha Hauer2012-12-192-5/+5
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap: Make timer base runtime configurableSascha Hauer2012-12-195-6/+14
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap: Make gpmc base runtime configurableSascha Hauer2012-12-193-4/+16
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap4: Add missing double include protectionSascha Hauer2012-12-191-1/+5
| | | | | | | | | | | | missing in omap4-clock.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap4: Add missing assembly protection in header fileSascha Hauer2012-12-191-0/+4
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap4: remove unused structSascha Hauer2012-12-191-9/+0
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM omap: remove unused functionSascha Hauer2012-12-192-20/+0
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/mxs'Sascha Hauer2013-01-097-4/+153
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| * | ARM: cfa10036: Use the board variant to load a different device treeMaxime Ripard2012-12-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The board variant found on the AT24 EEPROM holds the variant ID that we can use to identify which expansion board we are running on and thus which device tree to load and pass to the kernel. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: cfa10036: Retrieve the board variant from the AT24Maxime Ripard2012-12-144-1/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AT24 found on the expansion boards store the variant of the board it is soldered onto. That means that we are that way able to determine what expansion board is currently plugged in if any. If we can't communicate with the EEPROM, we just assume that only the CFA-10036 is there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: cfa10036: Add the AT24HC02 I2C EEPROMMaxime Ripard2012-12-143-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This EEPROM is found on the expansion boards available for the 10036 module. Since we won't need to do anything fancy except reading/writing from it, use bitbanging to communicate with it. This EEPROM will hold mostly the board_id so that we can determine if there is an expansion board plugged in and what expansion board it is. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2013-01-092-1/+3
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| * | | ARM: OMAP: Remove unneeded dependencies for GPMCAlexander Shiyan2012-12-191-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARCH_OMAP2 missing in barebox. ARCH_OMAP3 and ARCH_OMAP4 is only choice for this target. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | x86: Add formal Kconfig parameter "X86_BOOTLOADER"Alexander Shiyan2012-12-191-0/+3
| | |/ | |/| | | | | | | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/mips'Sascha Hauer2013-01-0913-0/+440
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| * | | MIPS: qemu-malta_defconfig: use pblAntony Pavlov2012-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USAGE $ make qemu-malta_defconfig ... $ make ... $ qemu-system-mips -nodefaults -M malta -m 256 \ -nographic -serial stdio -bios ./barebox-flash-image Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | MIPS: qemu-malta: add trivial pbl supportAntony Pavlov2012-12-142-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trivial pbl support has no cpu specific setup. We will add cache setup routines in the future. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | MIPS: add pre-bootloader (pbl) image supportAntony Pavlov2012-12-1410-0/+403
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is based on ARM pbl support and allows creating a pre-bootloader binary for compressed image. For different MIPS SoCs (or even for different boards based on the same SoC) the operations carried on in start-pbl.S can be very different. The additional constraints can be imposed on the size of the boot code or the special magic labels in the beginning of the boot code; In some cases it could be necessary to show CPU is alive as early as possible (transmit a char via UART or blink a LED). So the demands for pbl start operation can be very different. E.g. malta board store boot code at the NOR flash mapped to the MIPS power-on address (0xbfc00000); it is the most simple case: we need just copy pbl image from direct-mapped flash to RAM and jump there. The XBurst-powered boards store boot code in the beginning of a NAND flash or in the beginning of SD/MMC card. In this case we must use simple and short NAND or SD/MMC access routines to copy pbl image to RAM. To meet so different demands a simple technique is selected: * MIPS pbl entry point located in file arch/mips/boot/start-pbl.S. * MIPS pbl code (see start-pbl.S) assumes that every pbl-enabled board has a arch/mips/boards/<BOARD>/include/board/board_pbl_start.h header file. This file must contain definition of the board_pbl_start macro. This macro is used as start of pbl image; * the most popular asm routines (stack setup, relocation to link address, NS16550 initialization (WIP) and so on) are containt in the arch/mips/include/asm/pbl_macros.h header file. So board pbl macro can use it if necessary. It is possible to create similar headers with macros for each specific SoC; so even if we have many different boards based on the same SoC the board_pbl_start macro for every board can be short and clear. * after board-specific initialization the stack pointer is initialized and pbl C code is started. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx'Sascha Hauer2013-01-0939-307/+1455
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