| Commit message (Collapse) | Author | Age | Files | Lines |
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Otherwise building produces these warnings:
[...]
arch/efi/efi/efi-image.c:48:2: warning: implicit declaration of function 'read_file' [-Wimplicit-function-declaration]
arch/efi/efi/efi-image.c:48:6: warning: assignment makes pointer from integer without a cast [enabled by default]
[...]
And bootm fails for x86_64. The implicit declaration has an int as return
value, so half of the returned address is lost.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This fixes various stability issues seen on new boards
with the old setup.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Makes .imxcfg files a lot more readable.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Remove leftovers from previous conversion from C code to imxcfg
script.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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efi_get_global_var() returns an error code, not NULL when it fails.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Many boards use a USB vendor id of 0x4321. This doesn't exist and
shouldn't be used. Remove this and also the bogus product id of 0x1234.
The boards will use the barebox default vendor/product id then.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This renames USB to USB_HOST since this is what the symbol really
means. Introduce a USB symbol which is selected by both USB_GADGET
and USB_HOST. This gives us a symbol to let common USB code depend
on.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Conflicts:
arch/mips/dts/jz4755.dtsi
commands/Makefile
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Also enable CONFIG_LONGHELP.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use this qemu cmdline to test hwclock
$ qemu-system-arm -M versatilepb -nographic \
-monitor null -kernel barebox -serial stdio
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Change Product Data validity checking to ensure that support can
be provided for 8-bit and 16-bit EEPROM devices.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is a limited board support for the Freescale P1010RDB.
The board boots from NOR and output the prompt to the serial port
at 115200 bauds. All 3 Ethernet ports are supported by the gianfar
driver. I2C devices are accessible on both bus and the memory is
initialised by the 85xx DDR driver.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the Freescale P1010 including errata for this CPU,
SoC frequency calculation and GPIO settings.
The mpc85xx configuration options file is re-ordered to facilitate
board option selection.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add a minimal Integrated Flash Controller header file and new
definitions to support the P1010 SOC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move the configuration, control and status register base address
(CCSRBAR) relocation to the start-up processing. This addresses
TLB faults found during testing on the Freescale P1010RDB and
also matches the current U-Boot functionality.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Conflicts:
lib/Makefile
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Also move reset_cpu() for jz4755 SoC from platform code
into the new driver code.
At the moment mach-xburst lacks clk support so jz4740 watchdog
driver looks like a template. We can improve jz4740 watchdog
driver later after adding clk support.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Compiling the tree with allyesconfig is helpful because different
compilers (gcc, clang) or static checkers (e.g. clang's scan-build)
can then process and check more code.
This patch introduces two new configuration symbols that Kconfig files
can depend on. That way, code that is only working where a cache or DMA
implementation exists can be opted out.
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The ppc implementation is identical to the generic implementation, so
use the generic one instead.
Also add the missing __ffs function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We have many variants of the same bitops.h file. Consistently
use the same file for all architectures which completely use
the generic bitops versions.
Some architectures had static inline versions of functions
identically to the generic versions, these are removed and
the generic versions are used directly now.
Also several architectures depend on the generic find_*_bit
functions but didn't have the GENERIC_FIND_NEXT_BIT Kconfig
option selected. This is added where needed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Because that's where it belongs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Conflicts:
arch/arm/dts/Makefile
common/Makefile
lib/Makefile
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Usage:
$ qemu-system-mips -nodefaults -nographic -M malta -m 256 \
-serial stdio -monitor null \
-bios ./barebox-flash-image
...
barebox:/ imd /dev/nor0
release: 2014.07.0-00401-gd863821
build: #148 Sat Aug 2 09:22:16 MSK 2014
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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It's often useful to get some information about a barebox image
before starting or flashing it. This patch introduces barebox
Image MetaData (IMD). When enabled a barebox image will contain
a list of tags containing the desired information. We have tags
for:
- the barebox release (2014.07.0-00160-g035de50-dirty)
- the build timestamp (#741 Mon Jul 28 15:08:54 CEST 2014)
- the board model the image is intended for
- the device tree toplevel compatible property
Also there is an additional generic key-value store which stores
parameters for which no dedicated tag exists. In this patch it
is used for the memory size an image supports.
Since there is no fixed offset in a barebox image which can be
used for storing the information, the metadata is stored somewhere
in the image and found by iterating over the image. This works
for most image types, but obviously not for SoC images which are
encoded or encrypted in some way.
There is a 'imd' tool compiled from the same sources for barebox,
for the compile host and for the target, so the metadata information
is available whereever needed.
For device tree boards the model and of_compatible tags are automatically
generated.
Example output of the imd tool for a Phytec phyFLEX image:
build: #889 Wed Jul 30 16:08:54 CEST 2014
release: 2014.07.0-00167-g6b2070d-dirty
parameter: memsize=1024
of_compatible: phytec,imx6x-pbab01 phytec,imx6dl-pfla02 fsl,imx6dl
model: Phytec phyFLEX-i.MX6 Duallite Carrier-Board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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To build an object file from a device tree currently we currently
have to add them to the Makefile twice, once to dtb-y and once to
obj-y. This patch introduces obj-dtb-y and pbl-dtb-y to directly
compile a device tree object file for inclusion in the barebox binary
or the pbl respectively.
The now unneeded dtb-y targets are removed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We have our file helper functions in several places. Move them
all to lib/libfile.c.
With this we no longer have file helpers in fs/fs.c which contains
the core fs functions and no functions in lib/libbb.c which are
not from busybox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds a PCI driver for the controllers found on Marvell MVEBU SoCs.
Besides the functional driver itself, it also adds SoC specific PHY
setup required for PCIe. Currently, only Armada 370 is fully supported.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Accessing MBUS windows not backed-up by e.g. PCIe devices will
hang the SoC. Disable MBUS error propagation back to CPU allows
to read 0xffffffff instead of hanging the SoC.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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On Marvell MVEBU SoCs memory size is set up by BootROM and can be read
from SoC's RAM controller. With early DT fixups available, set corresponding
DT node to reflect accessible amount of directly attached RAM.
This patch also removes non-DT call to arm_add_mem_device to silence a
warning about request_region conflict due to adding a mem device twice.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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With proper DT fixup in place, we can now remove the overwrite of
mbus ranges in Armada 370 Mirabox and Armada XP Openblocks AX3.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For each supported MVEBU SoC, add the corresponding remapped registers
to fix them up in provided DTBs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Device trees can be passed by primary boot loader or appended to
barebox binary. Unfortunately, before probing devices from such
a device tree, no fixup can be applied.
Add a call to of_fix_tree() right before probing devices to catch
some very early fixups.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds a pinctrl driver for pin muxing on Marvell Armada XP. The
driver is ported from Linux and modified to fit on Barebox's common
mvebu pinctrl driver.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds a pinctrl driver for pin muxing on Marvell Armada 370. The
driver is ported from Linux and modified to fit on Barebox's common
mvebu pinctrl driver.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Allocate space for the resulting image (FCB+DBBT+Firmware) in
imx_bbu_internal_v2_write_nand_dbbt() instead of its caller to make the
code simpler.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead oof using the same constants multiple times use a variable
to make the meaning of the constants clear.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Documentation clearly states that the FCB at offset 0x68 has
to contain the start page of the firmware. In our case this
was set to 0x0. I don't know how this could ever work, but it
did, at least until:
15ee301 ARM: i.MX: bbu-internal: optionally use DCD data from image
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We have the hardcoded value 0x8000 for the space needed for FCB and
DBBT in several places. Use a variable instead and initialize it
correctly with 12 * meminfo.writesize (which is in fact 0x6000 for
2k pagesize).
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This will add support for Embedsky E9 board.
It is a small board based on i.MX6 Quad with 2G of RAM.
http://en.embedsky.com/product_info.php?cateid=169&id=169
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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