summaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-next/stm32'Sascha Hauer2019-11-0717-25/+728
|\
| * ARM: dts: stm32mp: report psci v0.2 at leastAhmad Fatoum2019-11-072-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM TF-A reports compatibility with PSCI v1.1 since v1.5. Upstream ARM TF-A support for STM32MP was introduced with v1.6. It's thus safe to assume that the STM32MP barebox will never have to interact with a secure monitor implementing PSCI v0.1. Overwrite the psci device tree compatible to specify v0.2. This is the first version that implements PSCI_VERSION, which allows the barebox psci client driver selected in this commit to query the actual PSCI version and fix it up into the device tree. This fixes an issue where resetting via PSCI fails in Linux because the upstream device tree compatible: reboot: Restarting system Reboot failed -- System halted Reported-by: Michael Olbrich <mol@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: select ARM_USE_COMPRESSED_DTB for the whole archAhmad Fatoum2019-11-072-1/+1
| | | | | | | | | | | | | | | | We'll probably be using compressed DTBs for all new boards as well, thus move the ARM_USE_COMPRESSED_DTB, so it's always selected for STM32MP. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: psci: implement PSCI client driverAhmad Fatoum2019-11-074-2/+221
| | | | | | | | | | | | | | | | | | | | | | | | System reset on the STM32MP may be done via PSCI when running TF-A as first-stage boot loader. Provide a PSCI driver to simplify using it: - A psci_invoke function is exported, so other code can use it - A fixup for the PSCI device tree node is registered - A reset and poweroff handler via PSCI is registered for PSCI >= v0.2 Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: psci: wire in smc command helpAhmad Fatoum2019-11-071-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The smc command has a help defined, but unused. Wire it in, so help smc and smc -invalidoption work as expected. While at it, remove the unimplemented -z option. It's unneeded, because -c turns off the CPU after starting it again already. Also it seems it's not implementable without interprocessor communication, which is probably overkill here. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: psci: use CONFIG_ARM_PSCI_DEBUG for smc commandAhmad Fatoum2019-11-071-1/+1
| | | | | | | | | | | | | | | | | | There's already an option to use when debugging PSCI. Instead of requiring users to #define DEBUG 1 as well, have the smc command be usable when CONFIG_ARM_PSCI_DEBUG, not DEBUG is defined. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: psci: translate PSCI error codes in smc commandAhmad Fatoum2019-11-071-1/+37
| | | | | | | | | | | | | | | | | | | | For more usability, translate CPU_ON error codes into the error descriptions found in the PSCI Platform Design Document[1]. [1]: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: enable STPMIC1 MFD and cell driversAhmad Fatoum2019-11-061-0/+3
| | | | | | | | | | | | | | | | The STPMIC1 is the ST Microelectronics PMIC designed for use with STM32MP. Enable it and its cell drivers by default in the defconfig. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: dts: stm32mp157a-dk1: remove unnecessary sram nodeAhmad Fatoum2019-11-061-13/+0
| | | | | | | | | | | | | | | | This node has so far been unused and is a remnant from when the stm32mp device drivers weren't completely upstream yet. Drop the node. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: include new drivers in defconfigAhmad Fatoum2019-11-061-3/+17
| | | | | | | | | | | | | | | | We've had some new drivers added for the STM32MP since the defconfig was first added. Include the newcomers. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: dk2: add barebox SD-Card update handlerAhmad Fatoum2019-11-063-0/+31
| | | | | | | | | | | | | | | | Now with the SD/MMC controller supported, lets add a bbu handler, so we can use it to update the second stage boot loader partition. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: implement SoC and boot source identificationAhmad Fatoum2019-11-064-1/+327
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The BSEC OTP holds information about SoC type and package. The Tamp registers hold information from the BootROM about boot source. Add support for both. Additionally, the tamp registers can also hold a request from the operating system about what mode to enter after boot, e.g. boot-into-recovery. A global function is exported for this, but unused so far. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * nvmem: add read support for STM32MP1 bsec OTPAhmad Fatoum2019-11-063-0/+73
| | | | | | | | | | | | | | | | | | The bsec on the STM32MP157C provides a 380 byte OTP. Add initial support for reading and writing the shadow copy of the fuses. Direct fuse access is not yet supported. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: select ARM_SMCCC alwaysAhmad Fatoum2019-11-061-0/+1
| | | | | | | | | | | | | | | | | | ARM_SMCCC compiles in the code for issuing ARM secure monitor calls. We need those on the STM32MP, because barebox runs in non-secure mode and does some operations like reading the BSEC OTP through SMCs. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: sm: document SMC/PSCI related optionsAhmad Fatoum2019-11-061-1/+5
| | | | | | | | | | | | | | | | At least to me, the difference between these options were confusing at first. Clear this up. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: enable ARM_AMBAOleksij Rempel2019-11-061-0/+1
| | | | | | | | | | | | | | It is needed for mci/sd/mmc driver. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: stm32mp: select ARCH_HAS_RESET_CONTROLLERAhmad Fatoum2019-11-061-0/+1
| | | | | | | | | | | | | | | | | | Many STM32 peripherals, including I2C, SPI, USB and SDMMC use the RCC reset controller for reset. Enable ARCH_HAS_RESET_CONTROLLER, so drivers depending on RESET_CONTROLLER become available for selection. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/socfpga'Sascha Hauer2019-11-075-11/+7
|\ \
| * | ARM: socfpga: defconfig: enable state_drvSteffen Trumtrar2019-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The Arria10 DTS uses the state framework. Enable the driver so it gets probed. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: socfpga: cyclone5-system-manager.h: remove definesSteffen Trumtrar2019-10-181-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | These defines are common for arria10 and cyclone5. Instead of having them here, they are moved to drivers/net/designware_socfpga.c. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: socfpga: arria10-xload: fix Wmissing-prototypesSteffen Trumtrar2019-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the warning: arch/arm/mach-socfpga/arria10-xload.c:17:5: warning: no previous prototype for 'a10_update_bits' [-Wmissing-prototypes] 17 | int a10_update_bits(unsigned int reg, unsigned int mask, | ^~~~~~~~~~~~~~~ Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: socfpga: clock-manager: fix Wmissing-prototypesSteffen Trumtrar2019-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the warning arch/arm/mach-socfpga/arria10-clock-manager.c:113:14: warning: no previous prototype for 'arria10_cm_get_mmc_controller_clk_hz' [-Wmissing-prototypes] 113 | unsigned int arria10_cm_get_mmc_controller_clk_hz(void) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: socfpga: reset-manager: fix Wmissing-prototypesSteffen Trumtrar2019-10-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warnings arch/arm/mach-socfpga/arria10-reset-manager.c:152:6: warning: no previous prototype for 'arria10_reset_deassert_shared_peripherals_q1' [-Wmissing-prototypes] 152 | void arria10_reset_deassert_shared_peripherals_q1(uint32_t *mask0, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm/mach-socfpga/arria10-reset-manager.c:226:6: warning: no previous prototype for 'arria10_reset_deassert_shared_peripherals_q2' [-Wmissing-prototypes] 226 | void arria10_reset_deassert_shared_peripherals_q2(uint32_t *mask0, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm/mach-socfpga/arria10-reset-manager.c:272:6: warning: no previous prototype for 'arria10_reset_deassert_shared_peripherals_q3' [-Wmissing-prototypes] 272 | void arria10_reset_deassert_shared_peripherals_q3(uint32_t *mask0, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm/mach-socfpga/arria10-reset-manager.c:329:6: warning: no previous prototype for 'arria10_reset_deassert_shared_peripherals_q4' [-Wmissing-prototypes] 329 | void arria10_reset_deassert_shared_peripherals_q4(uint32_t *mask0, uint32_t *mask1) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2019-11-073-8/+10
|\ \ \
| * | | sandbox: add_image: mmap block devicesRobert Karszniewicz2019-10-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes it possible to mount block devices from the host machine, which have been passed as arguments to --image Signed-off-by: Robert Karszniewicz <r.karszniewicz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | sandbox: add_image: output errno string on mmap failureRobert Karszniewicz2019-10-231-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Robert Karszniewicz <r.karszniewicz@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | hwrng: dev-random: always use /dev/urandomAhmad Fatoum2019-10-232-7/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | /dev/random can block long after boot time. It seems there's a consensus that /dev/urandom is safe to use except for very early boot, which isn't when barebox sandbox is usually run. To make the HWRNG more useful, always use /dev/urandom. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/mips'Sascha Hauer2019-11-0711-26/+314
|\ \ \
| * | | MIPS: loongsonl: pull headers from linux kernelDu Huanpeng2019-11-067-15/+305
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Du Huanpeng <u74147@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | MIPS: reloc: init bss and cpuOleksij Rempel2019-10-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We need it to make flush_cache_all() work properly. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | MIPS: move r4k_cache_init in to cpu_probe functionOleksij Rempel2019-10-233-6/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | MIPS: reloc: remove init of relocated bssOleksij Rempel2019-10-231-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It will be done in main_entry() any way. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/imx'Sascha Hauer2019-11-071-1/+2
|\ \ \ \
| * | | | ARM: zii-common: setup Linux cmdline network config on RDU3Lucas Stach2019-11-041-1/+2
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | Works the same way as with the older units. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | Merge branch 'for-next/efi'Sascha Hauer2019-11-072-0/+9
|\ \ \ \ | |_|_|/ |/| | |
| * | | efi: silence warning about un-prototyped assembly-called functionsAhmad Fatoum2019-10-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both _relocate and efi_main are only called from assembly, but -Wmissing-prototypes doesn't know that and warns about them. Pre-declare prototypes to silence the warnings. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | x86: include: add asmlinkage 'storage class'Ahmad Fatoum2019-10-181-0/+6
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've a number of C functions with external linkage that are only called from assembly. -Wmissing-prototypes warns about these unless they have a prototype that goes unused. Let's standardize on using the asmlinkage 'storage class' to mark such declarations. As <linux/linkage.h> defines asmlinkage to naught unless <asm/linkage.h> does, it's sufficient to add an empty header to make this usable on x86 as well. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: pbl: keep __image_end sectionLucas Stach2019-11-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not all architectures are referencing the image_end section from code, in which case the linker is free to drop the section, which then messes up the calculation of the _barebox_image_size linker variable. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | ARM: zii-commmon: Fix NULL pointer dereference in do_rdu1_switch_reset()Andrey Smirnov2019-11-041-1/+1
| |/ |/| | | | | | | | | | | | | | | | | We need to go to parent's private data to get a pointer to struct rave_sp. Fix that. Fixes: 493e2ee38f ("ARM: zii-common: add support for switch reset on RDU1") Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: at91: build for all SoCs when AT91_MULTI_BOARDS is selectedAhmad Fatoum2019-10-181-3/+3
|/ | | | | | | | | This reverts a hunk I missed after a rebase: A previous commit restricts ARCH_BAREBOX_MAX_BARE_INIT to only non-multi-image boards, so no need to touch it to be compatible with the new multi-image changes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/rsa'Sascha Hauer2019-10-1712-365/+31
|\
| * lds: Add and use RO_DATA_SECTION macroSascha Hauer2019-10-1412-126/+29
| | | | | | | | | | | | | | | | | | We have many different pointer arrays which we put into linker sections and each time there's one added we have to adjust all linker scripts. This adds a common RO_DATA_SECTION define and uses it for all architectures. This makes it easier to add a new linker array. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * X86: lds: remove unnecessary alignmentsSascha Hauer2019-10-143-20/+0
| | | | | | | | | | | | | | We do not seem to need all these alignments in the rodata sections, so remove them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * lds: create and use BAREBOX_PCI_FIXUP macroSascha Hauer2019-10-143-41/+3
| | | | | | | | | | | | | | No need to repeat the pci fixup sections in each linker script. Add a define for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * lds: Move start/end address variables into definesSascha Hauer2019-10-1412-199/+24
| | | | | | | | | | | | | | | | | | | | | | For the older section defines we specify the start and end addresses outside the macro which means we have to repeat them in each linker script. Make the start/end addresses part of the define to simplify things. While at it, add a BAREBOX_ prefix to the INITCALLS and EXITCALLS macros for consistency to the other defines. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Sam Ravnborg <sam@ravnborg.org>
| * ppc: remove unused variables from linker scriptsSascha Hauer2019-10-142-4/+0
| | | | | | | | | | | | __initcall_entries and __exitcall_entries are unused. Remove them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * barebox.lds: Remove unnecessary bracesSascha Hauer2019-10-145-9/+9
| | | | | | | | | | | | | | The BAREBOX_CLK_TABLE and BAREBOX_DTB macros are defines that do not take a parameter, so we can remove the braces. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/mxs'Sascha Hauer2019-10-1723-342/+126
|\ \
| * | ARM: add common i.MX23 defconfig fileSascha Hauer2019-10-023-97/+31
| | | | | | | | | | | | | | | | | | | | | Merge the defconfigs for the i.MX23 boards into a common imx23_defconfig. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: add common i.MX28 defconfig fileSascha Hauer2019-10-024-221/+20
| | | | | | | | | | | | | | | | | | | | | Merge the defconfigs for the i.MX28 boards into a common imx28_defconfig. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-25 06:44:30 +0000