summaryrefslogtreecommitdiffstats
path: root/drivers/clk/imx
Commit message (Expand)AuthorAgeFilesLines
* clk: i.MX8MQ: Add missing IMX8MQ_CLK_TMU_ROOT clockAndrey Smirnov2018-09-241-0/+1
* clk: i.MX8MQ: Bump refcounters of various important clocksAndrey Smirnov2018-09-241-0/+12
* clk: clk-sccg-pll: Remove leftover debug outputAndrey Smirnov2018-08-311-2/+0
* Merge branch 'for-next/imx'Sascha Hauer2018-07-092-18/+0
|\
| * mtd: gpmi-nand: Make sure clock is disabled during rate changeSascha Hauer2018-07-061-1/+0
| * clk: imx: remove unused clk_gate2_invertedSascha Hauer2018-07-061-17/+0
* | dts: update to v4.18-rc1Sascha Hauer2018-06-221-9/+8
|/
* clock: Add i.MX8MQ clock driverSascha Hauer2018-06-115-0/+1078
* clk: i.MX6: Fix enfc_sel for i.MX6dqpSascha Hauer2018-04-161-1/+18
* clk: i.MX6: Adjust GPMI parent clockSascha Hauer2018-04-121-0/+7
* clk: i.MX7: Port NAND clock setup code from LinuxAndrey Smirnov2018-04-032-2/+10
* ARM: imx25: clk: add rngb clockSteffen Trumtrar2018-02-091-2/+3
* clk: imx: cpu: don't store the address of a function parameterUwe Kleine-König2017-08-151-2/+10
* Merge branch 'for-next/imx'Lucas Stach2017-07-311-11/+0
|\
| * clk: i.MX7: Remove unused UART clocks arrayAndrey Smirnov2017-07-301-11/+0
* | i.MX: clk-pllv3: Initially disable PLL_BYPASS bitPhilipp Zabel2017-07-121-0/+5
|/
* i.MX: clk: Remove imx_clk_pllv3_locked()Andrey Smirnov2017-06-213-30/+14
* i.MX: clk-pllv3: Do not touch PLL_BYPASS bitAndrey Smirnov2017-06-211-2/+0
* clk-vf610: Mark all of CCSR muxes with CLK_OPS_PARENT_ENABLEAndrey Smirnov2017-06-211-6/+6
* ARM: i.MX6ul: Add Clock support for i.MX6ullStefan Riedmueller2017-05-171-11/+62
* ARM: i.MX50 clock: add clock for USB physbaseAlexander Kurz2017-04-241-0/+1
* Merge branch 'for-next/imx'Sascha Hauer2017-03-132-6/+2
|\
| * drivers: clk: clk-imx6.c: Don't gate LDB and IPUsDavid Jander2017-03-091-4/+1
| * clk: imx: clk-imx6ul: Use anatop_base pointer for consistencyRobin van der Gracht2017-03-061-2/+1
* | clk: imx: clk-imx6ul: Fixed conditional for enabling USB phy clocksRobin van der Gracht2017-03-031-1/+1
|/
* clk: i.MX7: setup ethernet clocksSascha Hauer2017-02-061-0/+11
* clk: i.MX7: do not register PLL bypass clocks as separate clocksSascha Hauer2017-02-061-119/+85
* clk: i.MX7: Fix ethernet clocksSascha Hauer2017-02-062-4/+17
* clk: i.MX7: do clock reparenting when all clocks are initializedSascha Hauer2017-02-061-8/+23
* clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessarySascha Hauer2017-02-061-4/+4
* clk: i.MX: clk-gate2: Allow to pass flagsSascha Hauer2017-02-062-9/+10
* ARM i.MX: Add i.MX6SL supportAlexander Kurz2017-02-021-0/+1
* ARM: i.MX6SL: import clock infrastructure from linuxAlexander Kurz2017-02-021-0/+329
* ARM i.MX31 clk: add pll_ref_clk and MCU PLL bypass selectAlexander Kurz2017-01-261-5/+23
* clk: i.MX7: Add missing USB clocksSascha Hauer2017-01-191-0/+3
* clk: i.MX: Add clock support for i.MX7Juergen Borleis2017-01-193-0/+908
* clk: imx: Add clk-cpu supportSascha Hauer2017-01-193-0/+114
* clk: i.MX: pllv3: Add support for the i.MX7 enet pllSascha Hauer2017-01-192-5/+19
* i.MX: vf610: Ramp CPU clock to maximum frequencyAndrey Smirnov2017-01-121-2/+161
* i.MX: clk: Add IMX_PLLV3_SYS_VF610 subtypeAndrey Smirnov2017-01-122-0/+113
* Merge branch 'for-next/vybrid'Sascha Hauer2017-01-121-0/+426
* i.MX: Add VF610 clock tree initialization codeAndrey Smirnov2017-01-112-0/+447
* i.MX: clk: Port imx_clk_mux_flags from LinuxAndrey Smirnov2017-01-111-0/+8
* i.MX: clk: Port imx_check_clocks()Andrey Smirnov2017-01-113-1/+26
* i.MX: clk: Add IMX_PLLV3_USB_VF610 supportAndrey Smirnov2017-01-112-3/+7
* i.MX: clk: Port imx_clk_gate2_cgr()Andrey Smirnov2017-01-112-7/+16
* i.MX: Move clk code from 'mach-imx' to 'drivers'Andrey Smirnov2017-01-1117-0/+3880
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-19 01:57:28 +0000