| Commit message (Collapse) | Author | Age | Files | Lines |
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parent_names[1] is only valid for PLLs that are not of the type pll_rk3328.
Yet, the code references it anyway unconditionally, triggering a KASan
error. Fix this by slightly reworking the code.
This issue also seems to exist upstream in Linux.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20231205081052.4145979-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Now that there are no longer any users of regmap.h in headers, let's
switch all users in the source files to linux/regmap.h.
That way, the only users of regmap.h whether directly or indirectly will
be out-of-tree code, which will fail with an error if they are dependent
on the old semantics of regmap_bulk_read and regmap_bulk_write.
After a transitory period, we can then drop regmap.h.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20231020071853.2826528-12-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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According to the reference manual the PLLs of type pll_rk3588_core also
need the CLK_MUX_HIWORD_MASK. Add it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds the rk3588 clk support from Linux-6.3-rc7 without much
changes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In rockchip_clk_register_pll() the number of parent_names is passed in
num_parents. Do not access parent_names[1] when the array is not big
enough.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This updates the Rockchip clk code to Linux-5.13-rc1. The code is
unchanged as much as possible. The pre- and post- change hooks are
removed and also the notifier blocks.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210602095507.24609-24-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In Linux the ops in struct clk_ops take a struct clk_hw * argument
instead of a struct clk * argument as in barebox. With this taking
new clk drivers from Linux requires a lot of mechanical conversions.
Instead of doing this over and over again swallow the pill once and
convert the existing barebox code over to clk_hw.
The implementation is a little different from Linux. In Linux struct clk
is only known to the core clock code. In barebox struct clk is
publically known and it is embedded into struct clk_hw. This allows
us to still use struct clk members in the clock drivers which we
currently still need, because otherwise this patch would be even
bigger.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.barebox.org/20210602095507.24609-5-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Linux has a clk_register() function with a different semantics than
barebox. Rename this function to bclk_register() so that we later
can introduce a clk_register() function with the same semantics as
Linux.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210602095507.24609-4-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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<asm-generic/div64.h> isn't meant for direct usage as <asm/div64.h> may
override this on a per-architecture basis. We don't do that currently,
but in the future we might. Include the <linux/math64.h> instead.
No functional change.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some of these are a product of source sync with Linux, the other were
done with macro assistance by searching for /later/, deleting license text,
adding appropriate SPDX-License-Identifier and manual post-review.
Devices without a license indicated where assumed GPL-2.0-only according
with the project's license.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We'll need mux specific flags in the future, so add a parameter to
the mux initialization functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We found setting a clock rate which has already been set, rk3188 (radxa rock
pro) bails out. This is a quick fix only. Underlying situation not (yet)
investigated: why it is even trying to set it to the same rate again. It
remains to state that some but not all rrpro boards exhibit this behaviour, no
other rk3188 boards have been tested.
Signed-off-by: P. Rachet <perachet7@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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