barebox - barebox master repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	clk: tegra: don't enable UART clocks by default	Lucas Stach	2014-11-04	1	-5/+5
\| \| \| \| \| \| \| \|	Now that we are registering a proper driver for the UARTs we no longer need to enable the clocks unconditionally. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	resource: Let dev_request_mem_region return an error pointer	Sascha Hauer	2014-09-16	1	-2/+2
\| \| \| \| \| \|	For all users fix or add the error check. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	clk: tegra20: register i2c clocks	Lucas Stach	2014-05-15	1	-0/+13
\| \| \| \| \|	Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	clk: tegra: reset UARTS from clock controller	Lucas Stach	2014-05-15	1	-0/+1
\| \| \| \| \| \| \| \| \| \|	The console devices are the only ones that can't use the reset controller properly, as they get registered from platform code. Reset those devices from the clock controller. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	reset: add tegra reset controller	Lucas Stach	2014-05-15	1	-0/+2
\| \| \| \| \| \| \| \|	Allows us to drop the hack in the clock controller and implement proper reset at device level. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	clk: tegra20: convert to dt-binding defines	Lucas Stach	2014-04-07	1	-88/+80
\| \| \| \| \| \| \| \|	Allows to make relationship between DT and driver more explicit and avoids duplication. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	clk: clk-fixed-factor: pass flags to initializers	Sascha Hauer	2014-03-28	1	-1/+1
\| \| \| \|	Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	clk: tegra: add SDMMC clocks	Lucas Stach	2013-12-04	1	-0/+18
\| \| \| \| \| \| \|	Provide peripheral clocks for the SD controller. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	tegra: speed up system bus	Lucas Stach	2013-12-04	1	-0/+7
\| \| \| \| \| \| \| \| \|	We run the system bus from the OSC clock during init, to avoid crashing the system while reconfiguring the PLLs. Switch to a more reasonable clock when we are done with this. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	tegra: add peripheral clocks	Lucas Stach	2013-07-02	1	-0/+28
\| \| \| \| \| \| \| \|	Only UART clocks are included for now, but the code should cover other peripherals needs, too. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
*	tegra: add new clock framework driver	Lucas Stach	2013-07-02	1	-0/+326
	This removes the existing Tegra CAR driver and replaces it with code ported from the Linux clock framework. In the current state only the relevant PLLs are supported, but this is no functional regression from the existing code. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>