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The BREN bit tells us a watermark level sized buffer is ready for read.
Instead of testing it before each FIFO read we must only check it once
and then read a watermark level sized buffer. This is at least necessary
on Layerscape, otherwise timeouts occur while reading the buffer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We'll need big endian support for Layerscape, so put the io accessors
into static inline wrappers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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To make them usable for the PBL driver aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The esdhc-xload code will be used by upcoming Layerscape support aswell,
so move it from architecture code to drivers/mci/.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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