| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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mostly by moving the registers into the correct address space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We are already setup voltages from capabilities register.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Whether the controller works in 8bit mode is not only dependent
on the controller but also on the board having wired up 8 data
lines, so put a capabilities field in platform data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Too often I have waited to get a reaction from this driver
when something goes wrong. Use timeout loops instead of
inifinite polling loops.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This argmuent is unused in all drivers, so remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As we'll need more arguments to set_ios over time put them
in a struct mci_ios like the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The caps are read from the hardware but overwritten afterwards.
Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Make the mci host a child of the hardware device and the disk
a child of the mci host.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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In the Kernel this bug is described like this:
> The CMDTYPE of the CMD register (offset 0xE) should be set to
> "11" when the STOP CMD12 is issued on imx53 to abort one
> open ended multi-blk IO. Otherwise the TC INT wouldn't
> be generated.
> In exact block transfer, the controller doesn't complete the
> operations automatically as required at the end of the
> transfer and remains on hold if the abort command is not sent.
> As a result, the TC flag is not asserted and SW received timeout
> exeception. Bit1 of Vendor Spec registor is used to fix it.
We do not use exact block transfers in barebox, so we only need
the first part of this fix.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds a driver for the esdhc controller found on Freescale
i.MX25/35/51 SoCs.
This code is based on the U-Boot driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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