| Commit message (Collapse) | Author | Age | Files | Lines |
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Commit 39f7a7ee8b68 ("i.MX: esdhc: Do not rely on CPU type for quirks")
made imx-esdhc dependent on OF and broke probing for all non-OF boards.
Since newer platforms like mx6 and vf610 are restricted to OF, the non-OF
probing only needs to distinguish mx5 vs earlier SoC.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Testing for the write protection bit to determine if a card is write
protected or not is wrong. The bit may have the wrong value for
permanently plugged cards (eMMC) or for boards using a GPIO for
write protection detection.
Since the core will test for write protection before actually
calling into the driver this test can just be removed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For architectures which do not enable all clocks during initialization.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Calling clk_get() with NULL as the second argument will give us "ipg"
clock as a result. The actual clock feeding into the peripheral is "per"
and, depending on the SoC, "ipg" and "per" may be separated by a clock
divider, so querying "ipg"'s rate may not result in rate that does not
represent the actual peripheral clock rate.
Change the code to request "per" as our peripheral clock to avoid
aforementioned problem.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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CPU type is not a reliable indicator of the underlying type of IP core
used, since there's no 1:1 mapping between the two. As example of one
such violation consider Vybrid SoC which contains IP block from i.MX53.
Instead port feature flags from corresponding Linux kernel driver and
use the ones that are relevant.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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To let the driver probe on i.MX6SX and i.MX6UL.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The i.MX50 SOC includes one ESDHCv3, three ESDHCv2, one cspi and
two ecspi instances which are supported by existing drivers.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This reverts commit 8a6896971d093b9d8d1c36eb0d7af891b6ca5369.
With this patch it's no longer possible to call detect on the
physical device which is necessary for example to make environment
on MMC work. Unlike the commit message for 8a6896971d claims
mci_detect_card() is not called from mci_register().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Function detect() is defined in the MCI core and mci_detect_card() is
already called form mci_register(). Remove excess fuction.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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First of all the reset values of MMC interfaces are differently between
Quad and DualLite/Solo SoM.
Register VEND_SPEC2(0xC8)
Quad: 0x0
DualLite: 0x00000006
default: 0x00000006 (from i.MX6 Reference Manual)
Furthermore the ROM Code of Quad and DualLite uses the MMC interfaces
differently when it loads the bootloader from that device:
Register DLL_CTRL(0x60) Bit 25 FBCLK_SEL (0x48)
Quad: 0x0 0
DualLite: 0x01000021 1
Since the linux kernel and barebox driver doesn't reset all registers,
the MMC interface is in an inconsistent state, which leads to boot
failures for some eMMC devices on the i.MX6 DualLite SoM. The errors
look like:
mmcblk3: error -110 sending stop command, original cmd response 0x900, card status 0x400900
mmcblk3: error -84 transferring data, sector 24578, nr 2, cmd response 0x900, card status 0x0
mmcblk3: retrying using single block read
mmcblk3: error -84 transferring data, sector 24578, nr 2, cmd response 0x900, card status 0x0
blk_update_request: I/O error, dev mmcblk3, sector 24578
It's sufficient to reset register DLL_CTRL and bit FBCLK_SEL. Register
VEND_SPEC2 has no effect.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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dev_request_mem_region doesn't work properly one some SoCs on which
PTR_ERR() values clash with valid return values from dev_request_mem_region.
Replace them with dev_request_mem_resource where possible.
This patch has been generated with the following semantic patch:
// <smpl>
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores)) {
...
- return PTR_ERR(io);
-}
+ return PTR_ERR(iores);
+}
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores))
- return PTR_ERR(io);
-}
+ return PTR_ERR(iores);
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
- ret = PTR_ERR(io);
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores)) {
+ ret = PTR_ERR(iores);
...
}
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores))
+ return PTR_ERR(iores);
+io = IOMEM(iores->start);
...+>
}
@@
identifier func;
@@
func(...) {
<+...
struct resource *iores;
-struct resource *iores;
...+>
}
// </smpl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This replaces printf with dev_* since a struct device_d * is
available.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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esdhc_pio_read_write can fail, so let it return an error code
rather than void.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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To get rid of some #ifdefery.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This helps with EMMC detection when booting from EMMC directly.
Taken from u-boot.
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Which will also be used for the i.MX6sx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The reset default of this register has changed on i.MX6sx. Explicitly
write the value we want to have to make it work on i.MX6sx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For all users fix or add the error check.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Conflicts:
arch/arm/boards/tqma53/board.c
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having DSR support in mci-core we need a way to
forward the DSR value to the driver. Add it to
platform data for imx-esdhc
TODO: implement the same for other host controller
drivers
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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A lot of files rely on include/driver.h including include/of.h (and
this including include/errno.h. include the files explicitly so we can
eventually get rid of including of.h from driver.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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At least i.MX53 has errata ENGcm12360:
Occurs when a pending command which issues busy is completed.
For a command with R1b response, the proper software sequence
is to poll the DLA for R1b commands to determine busy
state completion. The DLA polling is not working properly for
the ESDHC module. This is relevant for all eSDHC ports (eSDHC1-4 ports)
DLA bit in PRSSTAT register cannot be
polled to wait for busy state completion.
Updated block guide to reflect that DLA is not applicable to detect
busy state, instead, should poll bit 24 in PRSSTAT register (DLSL[0] bit)
to check that wait busy state is over.
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use MMC_CAP_ names instead of MMC_MODE_. This makes it more
clear that these are capabilities of host/card and do not refer
to the current mode. These are in line with the Linux Kernel
except for MMC_CAP_MMC_HIGHSPEED_52MHZ which could be fixed
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This updates the i.MX esdhc divider settings to FSLs U-Boot.
Current timings work fine for SD cards, but not for eMMC.
Although the calculation is fine according to the datasheet and reading from
eMMC works, writing is broken. Atleast on i.MX53/tqma53.
With this patch the result is the same, but uses different divider values to
achieve it.
While at it, replace the udelay with a busy-loop.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This gives the SDHCI specific registers a common name and moves
them to a separate file for use by other SDHCI like drivers.
The SDHCI spec has some 16bit and 8bit registers. The i.MX accesses
these as 32bit registers. These register defines now are named after
the SDHCI registers they combine into one, for example:
SDHCI_HOST_CONTROL__POWER_CONTROL__BLOCK_GAP_CONTROL
is the 32bit version of the SDHCI registers HOST_CONTROL, POWER_CONTROL
and BLOCK_GAP_CONTROL.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Remove some leftover from former powerpc support which has no
relevance for i.MX based esdhc controllers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For boards which need to have persistent names for the device file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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During card probe the mci core may send commands to the card
which the card doesn't understand. This is intended, so do not
print an error message here.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The old clock support is now unused. Remove it. The former i.MX clko
command is superseeded by generic clock manipulation commands.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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platform_driver/device_register
now register_driver and register_device are for bus only usage.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Conflicts:
drivers/net/miidev.c
include/miidev.h
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The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The timeout for wating for the bus to be idle is too short when the
card does internal garbage collection. This was triggered with filling
an SD card under Linux with /dev/urandom, then doing a saveenv under
barebox afterwards.
Linux has timeouts here up to 300ms. Use a second to be safe.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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mostly by moving the registers into the correct address space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We are already setup voltages from capabilities register.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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