| Commit message (Collapse) | Author | Age | Files | Lines |
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Microchip SAMA5D27 has more then one TX queue. So it will
go in to TX timeout if only one was initialized.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Use the potentially endianness-changing readl, writel and siblings
directly. They looks prettier and are the correct thing to do, as
even if the CPU is in big-endian mode, the peripherals are little-endian.
Unlike Linux, barebox readl,writel are the same Linux'
{readl,writel}_relaxed (they don't imply memory barriers)
and thus there shouldn't be any functional change.
Patch was generated by a mass search and replace. I looked it over,
adjust some whitespace and further verified by reviewing the output of
git diff HEAD~1 --word-diff | \
perl -pe 's/\[-(.*?)__raw_/{+$1/; s/-\]\{\+/+}{+/;' \
-e 's/(\{\+.*?\+\})\1/__ALL_IS_WELL__/' | grep '+}{+'
which filters out the common case of lines where a single
__raw_{readT,writeT} had its __raw_ prefix stripped without any
further changes.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Tested-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Provide descriptors for second priority rx and tx queues and disable the
the queues if hardware is GEM. Otherwise the function macb_send() will run
into a timeout.
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Roland Hieber <r.hieber@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The core has a bit for swapping packet data endianism.
Reset default from Cadence is off. Xilinx however, that uses this core on the
Zynq SoCs, opted for on. Turn it off for all devices.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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based on the kernel code
detect it via IP version
In the GEM we can use a full packet buffer for receive but the buffer size
need to be 64bit size aligned.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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