| Commit message (Collapse) | Author | Age | Files | Lines |
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Add support for Vybrid variant of this IP block
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For some i.MX variants more than just "ipg" clock need to be enabled for
Ethernet to function, so change the code to enable all of the clock
defined for FEC node (this is what analogous Linux driver does as well).
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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EEPROM support is an optional feature and the driver should work
just fine without it.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Driver "init" function might be called multiple times.
On every "init" Tx/Rx buffer descriptors are initialized: "descs_init"
-> "{tx|rx}_descs_init".
In its turn those init functions set MAC's "{tx|rx}desclistaddr" to
point on the first buffer descriptor in the list.
So CPU to start operation from the first buffer descriptor as well after
every "init" we have to reset "{tx|rx}_currdescnum".
[Original U-Boot patch by Alexey Brodkin <abrodkin@synopsys.com>]
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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"bus mode" register contains lots of fields and some of them don't
expect to be written with 0 (zero). So since we're only interested in
resetting MAC (which is done with setting the least significant bit of
this register with "0") I believe it's better to modify only 1 bit of
the register.
[Original U-Boot patch by Alexey Brodkin <abrodkin@synopsys.com>]
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Do not select MIIPORT for RGMII interface
[Original U-Boot patch by Vipin Kumar <vipin.kumar@st.com>]
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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There are a few registers where consecutive writes to the same location
should be avoided or have a delay.
According to Synopsys, here is a list of the registers and bit(s) where
consecutive writes should be avoided or a delay is required:
DMA Registers:
Register 0 Bit 7
Register 6 All bits except for 24, 16-13, 2-1.
GMAC Registers:
Registers 0-3 All bits
Registers 6-7 All bits
Register 10 All bits
Register 11 All bits except for 5-6.
Registers 16-47 All bits
Register 48 All bits except for 18-16, 14.
Register 448 Bit 4.
Register 459 Bits 0-3.
[Original U-Boot patch by Dinh Nguyen <dinguyen@altera.com>]
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ksz8021_config_init() unconditionally sets the KSZPHY_OMSO_RMII_OVERRIDE
bit. This is since the initial micrel phy commit, so it's not
reproducible where this comes from and why this is done. Neither U-Boot
nor the kernel ever touch this bit and so should we. Also, instead
of doing a write only operation, read/modify/write the bit we actually
want to change.
This fixes operation on a KSZ8081MLX which is a MII only phy.
KSZPHY_OMSO_RMII_OVERRIDE is reserved here and must be written to 0.
KSZPHY_OMSO_MII_OVERRIDE is default 1 and must be written as 1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This way the ethernet device will show up at the correct point
in the device hierarchy.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Don't mask out the remapping flag before checking the register offset,
otherwise none of the switch statements will ever match.
Fixes: ff6a64d42ffc (e1000: Consolidate register offset fixups)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This fixes tx error detection which triggered way too often because the
hardware doesn't seem to clear the error bits on success
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Without first assigning to ret it doesn't make sense to check it.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The phy_device_create() function makes all necessary phydev initialization
so we can drop phydev->pause and phydev->link initialization in
the of_phy_register_fixed_link() function.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When no new packets have arrived we want to return to the caller
as soon as possible to give other network controllers the chance
to receive packets. With the current USB bulk message timeout of
one second other network controllers do not work properly whenever
the USB network controller is active.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch adds parsing basic devicetree options for the smc911x driver:
reg-io-width, reg-shift and smsc,force-(in/ex)ternal-phy, which makes
driver usable for most DTS-based boards.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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priv->buswidth expects IORESOURCE_MEM_* macros which are not
identical to the integer byte bus width, so calling
dm9000_setup_buswidth() for the platform_data case is wrong.
fixes: d818f02 net: dm9k: add device tree support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reported by: 张忠山 <zzs213@126.com>
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The patch fixes this compiler's warning:
drivers/net/phy/phy.c:303:20: warning: no previous prototype for
‘of_phy_register_fixed_link’ [-Wmissing-prototypes]
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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KSZ9081 only supports two phy ids 0x0 and 0x3. 0x0 is also
used as broadcast address. Disable broadcast, so that id 0x0
can be used as unique address on a shared bus.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add code needed to access SPI-NOR flash attached to i210 as a regular
MTD device.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add code needed to expose iNVM memory on the chip as a cdev. The
driver also registers a dummy "invm" device that exposes "locked"
property which is used to implement iNMV line locking feature.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As per datasheet (section 4.6 p. 147) accessing EEPROM on i210
requires software to hold a corresponding lock bit in SW_FW_SYNC
register.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As described in the datasheet Software/Firmware synchronisation bits
are expected to be released by the software after it is done using
it. Add a porper subroutine to do that instead of relying on the
Firmware clearing those bits due to timeout.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Refactor Flash/EEPROM reading code to use vtable with pointers to
small, specialized functions based on the flash class instead of big
monolithic funtions whose behaviour is driven by a number of flags and
variables.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We always call e1000_init_eeprom_params() as a part of probing, so
there's no need check if it needs to be called in e1000_read_eeprom().
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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There are several reasons why that code in e1000_probe had to be
changed:
- It reads from chip variant specific register (present only on
i210) in a chip variant agnostic codepath
- It makes no sense to check for FLUPD bit to make a decision weither
to validate EEPROM or not since its function per datasheet is:
" ... Flash Update.
Writing 1b to this bit causes the content of the internal 4 KB
shadow RAM to be written into one of the first two 4 KB sectors
of the Flash device (Sector 0 or Sector 1). The bit is
self-cleared immediately... "
and it is only through sheer serendipity the defined value for
bitmask for FLUPD is equivalent to bitmask for FLASH_DETECTED bit
which is the bit we actually care about and need to test against
(FLUPD for i210 has a different bitmask)
Fix those problems by replacing the i210 specific check inside of
e1000_validate_eeprom_checksum() with a chip agnostic one and using
correct bitmask.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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All of the chips that bitbang Microwire to access EEPROM appear to be
configured in the same way, so move common code into a separate
function and make use of it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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All of the chips that bitbang SPI to access EEPROM appear to be
configured in the same way, so move common code into a separate
function and make use of it.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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That chip specifies read access uising EERD via use_eerd, which means
that none of the more "advanced" EEPROM parameters will be used for
reads, so remove them.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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That chip specifies read access uising EERD via use_eerd, which means
that none of the more "advanced" EEPROM parameters will be used for
reads, so remove them.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Remove 'page_size' from 'struct e1000_eeprom_info' since it is not
used anywhere in the code.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Remove 'use_eewr' from 'struct e1000_eeprom_info' since it is not used
anywhere in the code.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Consolidate all code taking care on CSR offset differences for i210
chips into a single place in the driver and integrate that funcionality
into e1000_{read,write}_reg functions. This way we can get rid of all
those
if (hw->mac_type == e1000_igb) {
....
} else {
....
}
snippets sprinkled all across the driver code.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Despite having EEC(EECD) and EERD at "non-standard" offsets i210
aliases those registers to be accesible via regular addresses so none
of the code removed by this commit is really necessary.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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EEPROM_INIT_CONTROL2_REG is already read once before entering this
switch statement, so there's not much use in reading its value for the
second time.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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There doesn't seem to be any point for having 'nv_packet' variable and
it looks like a leftover from driving porting. Remove it and use
'txpacket' instead
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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It seems there's stray exclamation mark character in
e1000_detect_gig_phy which renders the whole if statement useless
since it converts 'phy_type' into a boolean and comparing that to 0xFF
would always result in false (which GCC 5.1 is now able to detect and
warn about). This commit fixes that.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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E1000_*_REG don't bring any value by being macros and implicit appending
of "E1000_" prefix to the constant name only makes thing harder to grep
or understand. Replace those macros with functions.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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That header(e1000.h) uses a number of definitions from net.h, so for it
to be self-contained it needs to include that file. This change also
allows remove includes of net.h from other files.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The driver has a number of not very tightly coupled subsystems and at
4K+ lines e1000.c is getting rather hard to wrangle, so let's move
EEPROM handling code (very self contained susbsystem) into a separate
file and put all of the driver into a dedicated subdirectory.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Commit da89ee8f2e04 ("Center FLP timing at 16ms") breaks
genphy_restart_aneg() for Micrel's ksz9031. According to the
datasheet, the ksz9031 requires a wait of 1ms after clearing
the PDOWN bit and before read/write access to any PHY registers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some network devices, especially when connected to a switch, are
connected via a fixed link. This patch adds support for a fixed phy
configured through device tree.
TODO: Add support for the "speed" and "full-duplex" properties.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski@kiwigrid.com>
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Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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