summaryrefslogtreecommitdiffstats
path: root/drivers/net
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-next/misc'Sascha Hauer2022-01-191-2/+0
|\
| * net: designware: rockchip: remove unnecessary clock pclk_xpcsMichael Riesch2022-01-141-2/+0
| | | | | | | | | | | | | | | | | | | | The pclk_xpcs clock is not used in the mainline Linux driver and only rarely specified in the mainline dts files. Drop it in order to avoid errors when the mainline dts files are used. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.barebox.org/20211111140316.1646962-3-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: cpsw: add support for new binding in Linux v5.15-rc1 DTsAhmad Fatoum2022-01-071-31/+89
|/ | | | | | | | | | | | | | | | | As is customary, upstream OMAP DTs have yet again added a new binding breaking compatibility with a barebox driver. This time, the old Ethernet node was disabled in favor of a new node that is matched by the new Linux cpsw driver introduced with Linux commit ed3525eda4c4 ("net: ethernet: ti: introduce cpsw switchdev based driver part 1 - dual-emac"). Add support for the new binding to restore working Beaglebone Black networking. These changes have been tested against both the old and new bindings. Fixes: 618948e4e5b3 ("dts: update to v5.15-rc1") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211203205035.555285-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2021-12-1536-36/+36
|\
| * drivers: migrate "GPL-2.0+" license identifiers to SPDX 2.0Roland Hieber2021-11-222-2/+2
| | | | | | | | | | | | | | | | | | "GPL-2.0-or-later" was introduced in SPDX 2.0, and the old identifier "GPL-2.0+" is now deprecated; see <https://spdx.org/licenses>. Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20211117113851.2022669-3-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * drivers: migrate "GPL-2.0" license identifiers to SPDX 2.0Roland Hieber2021-11-2234-34/+34
| | | | | | | | | | | | | | | | | | | | "GPL-2.0-only" was introduced in SPDX 2.0, and the old identifier "GPL-2.0" is now considered deprecated; see <https://spdx.org/licenses>. Fixes: 28f4a6a4df76f0f1581d (2021-10-30, "drivers: add missing SPDX-License-Identifier") Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20211117113851.2022669-2-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: efi-snp: Open protocol exclusivelySascha Hauer2021-12-131-2/+54
| | | | | | | | | | | | | | Open the SNP protocol exclusively. Without it other protocol instances may poll for packets as well causing packet loss. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: efi-snp: Check for carrier before sendingSascha Hauer2021-12-131-0/+3
| | | | | | | | | | | | | | We have carrier informations available, so check them before sending a packet. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | efi: rename <efi/efi.h> to <efi/efi-payload.h>Ahmad Fatoum2021-11-251-1/+1
|/ | | | | | | | | | | The split between <efi.h> and <efi/efi.h> is confusing: The former contains universal definitions, while the latter contains barebox utilities on top. To make the distinction clear, rename <efi/efi.h> to <efi/efi-payload.h> as it's used for EFI payloads. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211122084732.2597109-14-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/spdx'Sascha Hauer2021-11-1525-6/+25
|\
| * drivers: add missing SPDX-License-IdentifierAhmad Fatoum2021-11-0125-6/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the suitable SPDX-License-Identifier to all files in drivers/ that previously lacked one. To aid manual inspection, following heuristics can be used: * No changes outside of comments/whitespace: git show -U0 HEAD | rg -v '^(@@|diff|index)|[-+]([-+]|//|#|[\s/]\*)' * -or-later come in pairs: git show --inter-hunk-context=19 HEAD | \ perl -0777 -F'/^@/gm' -ne 'for (@F) { @m = /later/g; print if @m & 1 }' Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030175632.2276077-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2021-11-157-38/+3697
|\ \
| * | net: phy: micrel: sync init code for ksz80xx variants with the kernel driverOleksij Rempel2021-11-111-22/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync part of barebox micrel driver with the kernel v5.15-rc1. This change will affect most of by barebox supported 100Mbit/ksz80xx PHY variants and provide unified devicetree support for LED and clock configuration. At same time, NAND and broadcast configuration parts are synced as well to reduce the difference with the kernel driver. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211013121825.4278-2-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: net: Add support for the Realtek RTL8152B/RTL8153Oleksij Rempel2021-11-055-0/+3419
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Realtek RTL8152B/RTL8153 ethernet converter chip. This driver is based on U-Boot version v2021.10 with port to barebox internal frameworks. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.barebox.org/20211101125538.512494-1-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: ksz8864: Add support for KSZ87xx switchesTrent Piepho2021-10-121-16/+50
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the ksz8765, ksz8794, and ksz8795 switches. IDs for OF bindings are added. The base chip type is "ksz8795", the same as the Linux driver, for the ksz87xx switches added here. "ksz8864rmn" is used for the existing switch. The registers for these switch chips, as least as far as this simple driver is concerned, are the same as the existing ksz8864 support. The difference in the ksz87xx chips is the format of the command and address bytes: C = command A = address (used bits) a = address (unused bits) p = turn around padding bit ksz8864: 00000CCC AAAAAAAA ksz8795: CCCaaaaA AAAAAAAp CCC and AAAAAAAA are the same, it's just where they are that changes. This is parameterized in the read/write reg functions by using two values for the address width and pad width. Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com> Link: https://lore.barebox.org/20211011184213.854061-1-trent.piepho@igorinstitute.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / net: designware: eqos: fix MDIO regression for STM32MP1 boardsAhmad Fatoum2021-11-051-1/+5
|/ | | | | | | | | | | | | | The STM32MP1 boards call their mdio subnode mdio0, which is now skipped since ed8c7bdf8592 ("net: designware: eqos: set mdio bus device node"). Fix networking for them by only falling back to the mdio node name when a child node with the correct compatible could not be found. Fixes: ed8c7bdf8592 ("net: designware: eqos: set mdio bus device node") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Link: https://lore.barebox.org/20210831153214.31047-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/riscv'Sascha Hauer2021-10-073-0/+385
|\
| * net: add LiteEth driverAntony Pavlov2021-10-073-0/+385
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LiteEth provides a small footprint and configurable Ethernet core. LiteEth is part of LiteX libraries whose aims are to lower entry level of complex FPGA cores by providing simple, elegant and efficient implementations of components used in today's SoC such as Ethernet, SATA, PCIe, SDRAM Controller... Using Migen to describe the HDL allows the core to be highly and easily configurable. LiteEth can be used as LiteX library or can be integrated with your standard design flow by generating the verilog rtl that you will use as a standard core. See https://github.com/enjoy-digital/liteeth for details. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Marek Czerski <m.czerski@ap-tech.pl> Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210817101104.114945-7-antonynpavlov@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: eqos: let phy_resume handle fixed link physRouven Czerwinski2021-10-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently barebox will try to talk to the phy over mdio, even if the parent is a fixed-link. This will result in the following stacktrace: barebox@Linux Automation Test Automation Controller (TAC):/ dhcp unable to handle NULL pointer dereference at address 0x00000130 pc : [<dfc01800>] lr : [<dfc0f963>] sp : dffefd40 ip : 004c4b40 fp : d00286e0 r10: cf25cc4e r9 : 00000000 r8 : 05f5e100 r7 : 00000130 r6 : 00000000 r5 : 00000000 r4 : 00000130 r3 : 00000109 r2 : 00000000 r1 : 00000000 r0 : 00000130 Flags: nZCv IRQs off FIQs off Mode SVC_32 WARNING: [<dfc01800>] (slice_acquire+0xc/0x28) from [<dfc0f963>] (mdiobus_read+0x13/0x28) WARNING: [<dfc0f963>] (mdiobus_read+0x13/0x28) from [<dfc10685>] (eqos_start+0x85/0x32c) WARNING: [<dfc10685>] (eqos_start+0x85/0x32c) from [<dfc3cdf1>] (eth_open+0xd/0x24) WARNING: [<dfc3cdf1>] (eth_open+0xd/0x24) from [<dfc3e391>] (dhcp+0xb/0x3a) WARNING: [<dfc3e391>] (dhcp+0xb/0x3a) from [<dfc30fab>] (do_dhcp+0xfb/0x114) WARNING: [<dfc30fab>] (do_dhcp+0xfb/0x114) from [<dfc0490f>] (execute_command+0x23/0x4c) WARNING: [<dfc0490f>] (execute_command+0x23/0x4c) from [<dfc0a127>] (run_list_real+0x5bf/0x638) WARNING: [<dfc0a127>] (run_list_real+0x5bf/0x638) from [<dfc09a2b>] (parse_stream_outer+0xc7/0x154) WARNING: [<dfc09a2b>] (parse_stream_outer+0xc7/0x154) from [<dfc0a383>] (run_shell+0x3f/0x6c) WARNING: [<dfc0a383>] (run_shell+0x3f/0x6c) from [<dfc010b9>] (run_init+0x191/0x200) WARNING: [<dfc010b9>] (run_init+0x191/0x200) from [<dfc01153>] (start_barebox+0x2b/0x6c) WARNING: [<dfc01153>] (start_barebox+0x2b/0x6c) from [<dfc4be6d>] (barebox_non_pbl_start+0x121/0x164) WARNING: [<dfc4be6d>] (barebox_non_pbl_start+0x121/0x164) from [<dfc00005>] (__bare_init_start+0x1/0xc) WARNING: [<dfc4da7d>] (unwind_backtrace+0x1/0x78) from [<dfc01461>] (panic+0x1d/0x34) WARNING: [<dfc01461>] (panic+0x1d/0x34) from [<dfc4b6a3>] (do_exception+0xf/0x14) WARNING: [<dfc4b6a3>] (do_exception+0xf/0x14) from [<dfc4b711>] (do_data_abort+0x21/0x34) WARNING: [<dfc4b711>] (do_data_abort+0x21/0x34) from [<dfc4b454>] (do_abort_6+0x48/0x54) Simply return with 0 if bus is NULL which indicates that the phy is connected to a fixed link. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Link: https://lore.barebox.org/20210825065554.23283-1-r.czerwinski@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: cpsw: fix ethernet bringup in case of a fixed-link phyKarfich, Oleg2021-10-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | In case of a fixed-link phy the cpsw_adjust_link() function is called directly in phy_device_attach() and configures the MACCONTROL register. Right after this configuration cpsw_init() is called and resets the MACCONTROL register. Fix this by initializing the slave before connecting the phy device in cpsw_open(). Signed-off-by: Oleg Karfich <oleg.karfich@wago.com> Link: https://lore.barebox.org/1630414594-10601-1-git-send-email-oleg.karfich@wago.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: add virtio network driverAhmad Fatoum2021-10-053-0/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | This gives virtio-enabled boards an easy route to network connectivity: qemu-system-aarch64 -M virt -serial mon:stdio -trace file=/dev/null \ -kernel images/barebox-dt-2nd.img -cpu cortex-a57 -nographic \ -device virtio-net-device,netdev=network0 -netdev tap,id=network0,ifname=tap0 The tap0 interface created by QEMU can then be bridged/listened on. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: e1000: split EEPROM and barebox MTD wrapper into separate filesAhmad Fatoum2021-08-234-815/+839
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the addition of the EFI PCI bus driver, e1000 can now be built for x86 as well. This only works when CONFIG_MTD=y, because otherwise add_mtd_device is not defined leading to a link error. This doesn't happen with other platforms, because linker garbage collection, which is not used for the EFI platform. Fix this issue by separating the generic EEPROM parts from the barebox-specific MTD parts and compiling the MTD parts conditionally. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210812121944.4419-5-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: make ARC MAC driver 32-bit onlyAhmad Fatoum2021-08-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | The driver assumes 32-bit pointers and only matches against 32-bit rockchip device trees. Make this official in the kconfig, so it's not selectable on 64 bit, where it would issue build warnings and probably not work anyway. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210812121944.4419-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: drop Calxeda Highbank xgmac driver supportAhmad Fatoum2021-08-233-739/+0
|/ | | | | | | | | | | | Support for MACH_HIGHBANK was removed in f0f96c3322d5 ("ARM: remove Calxeda Highbank support"). There are no device trees either barebox or upstream using this network controller, so remove the driver as well. Fixes: f0f96c3322d5 ("ARM: remove Calxeda Highbank support") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210812121944.4419-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: designware: add support for IP integrated into StarFive SoCAhmad Fatoum2021-06-245-3/+124
| | | | | | | | | | The Designware MAC on the StarFive jh7100 needs some special speed configuration. Match against a new starfive,stmmac compatible that describes that. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210619045055.779-17-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: designware: fix non-1:1 mapped 64-bit systemsAhmad Fatoum2021-06-242-27/+58
| | | | | | | | | | | | | | | drivers/net/designware.c handles the older Designware < 4.x MAC IPs, which do not support DMA beyond 32-bit. They are still being integrated into SoCs with 64-bit CPUs like the StarFive JH7100, which additionally needs a non 1:1 mapping for coherent DMA. Fix the driver to support such usage. The driver still has the assumption that barebox core will only pass it 32-bit pointers. This is now made explicit by returning error codes when the DMA mask is violated. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210619045055.779-16-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/net'Sascha Hauer2021-06-164-0/+353
|\
| * net: eqos: Rockchip supportSascha Hauer2021-06-093-0/+324
| | | | | | | | | | | | | | | | | | | | A variant of the designware eqos core is used on Rockchip SoCs. Add support for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608093635.5749-5-s.hauer@pengutronix.de Link: https://lore.barebox.org/20210609085512.3865-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net: designware: eqos: set mdio bus device nodeSascha Hauer2021-06-091-0/+1
| | | | | | | | | | | | | | | | | | | | When the device node of the ethernet device has a mdio subnode then attach it to the registered mdio bus. This allows the mdio driver to handle the reset-gpios propertie in the phy nodes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608093635.5749-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net: designware: eqos: reset phySascha Hauer2021-06-091-0/+28
| | | | | | | | | | | | | | | | | | | | The designware eqos DT binding has support for specifying reset GPIOs. Add support for them. This binding is deprecated for new boards, but there are still some upstream dts files using it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20210608093635.5749-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2021-06-161-5/+29
|\ \
| * | net: phy: micrel: Add led-mode supportTrent Piepho2021-06-091-5/+29
| |/ | | | | | | | | | | | | | | | | | | | | | | Add code that will use the micrel,led-mode property to configure the led. It seems nearly every Micrel PHY equipped board has a custom phy fixup to do this. Maybe some of them won't be needed anymore. Signed-off-by: Trent Piepho <tpiepho@gmail.com> Link: https://lore.barebox.org/20210531150045.1214037-1-tpiepho@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/i2c'Sascha Hauer2021-06-161-6/+5
|\ \
| * | nvmem: provider: align read/write callback prototype with upstreamAhmad Fatoum2021-06-021-6/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | barebox allocates a NVMEM device as part of nvmem_register, which it passes along to the callbacks. Callbacks then use dev->parent->priv to retrieve the driver private data. This indirection makes definition of nvmem helpers inconvenient, because they would need to hijack the ->priv member of the hardware device. Avoid this by passing along some private data pointer defined at registration time, just like Linux does. This will be used in a follow up commit. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210531072406.5630-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / net: macb: add SiFive supportAhmad Fatoum2021-06-091-0/+120
|/ | | | | | | | | | | | | | | The Ethernet controller on the SiFive SoCs needs some special TX clock setup. Port the relevant Linux v5.12 bits to enable it. As the macb driver is used for some old at91 boards that aren't yet ported to the common clock framework, that new setup code has to be in an #ifdef. Tested on qemu-system-riscv64 -M sifive_u with dhcp. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210531065815.18641-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: at803x: fix incorrect use of FIELD_PREPAhmad Fatoum2021-03-251-4/+3
| | | | | | | | FIELD_PREP expects mask datatype to be a constant unsigned long. The mask constant already has the correct datatype, so pass it directly. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: macb: add tx clock rate for 10 MBit linkMichael Tretter2021-03-221-0/+3
| | | | | | | | | | | If the phy reports a 10 MBit link, which can happen during link negotiation, the macb prints a warning, because it does not know the clock rate for the TX clock. Implement setting the TX clock rate for 10 MBit to avoid the warnings. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: dp83867: enable link downshift by defaultThomas Haemmerle2021-03-221-6/+10
| | | | | | | | | Linux enables link downshift by default. Use the same bit definitions as Linux and enable downshift in Barebox, as well. Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: dp83867: read status from PHY status register PHYSTSThomas Haemmerle2021-03-221-0/+36
| | | | | | | | | | | | | | | | Read link status information in dp83867 specific register instead of using `genphy_read_status()`. In case of a link downshift, `genphy_read_status()` can return `SPEED_1000` even if the negotiated speed is 100 Mbit. A downshift can happen, if both link-partners are gigabit-capable, but the connection supports only 100 MBit, for example because of a 100 MBit PoE injector that connects only 2 of the 4 twisted pairs. Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: dp83867: remove explicit setting of cfg2Thomas Haemmerle2021-03-221-10/+1
| | | | | | | | | Setting cfg2 is superfluous, because it just sets the default value. Remove it. Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: dp83867: simplify dp83867_config_initThomas Haemmerle2021-03-221-26/+23
| | | | | | | | | Reorder the code in dp83867_config_init to remove duplicated check of the phy interface. Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: dp83867: remove useless call to genphy_config_anegMichael Tretter2021-03-221-8/+0
| | | | | | | | | | | | | genphy_config_aneg will be called by the generic code anyway. No need to call it from the driver. As at it, do not explicitly set the config_aneg and read_status pointers, because they will be automatically set anyway. Remove the "hello world" message by the driver, too. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: dp83867: fix checkpatch checks and warningsMichael Tretter2021-03-221-38/+37
| | | | | | | | Mostly indentation changes to make checkpatch happy and make the code a bit easier to the eyes. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: dp83867: convert driver to spdxMichael Tretter2021-03-221-9/+1
| | | | | Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: e1000: Fix mtd compilationSascha Hauer2021-03-121-6/+6
| | | | | | | | mtd function hooks have been renamed to start with an underscore. Fix e1000 driver accordingly. Fixes: 4d3c779dfc ("mtd: Add underscore prefix to mtd hooks") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: phy: fix waiting for linkSascha Hauer2021-03-121-1/+1
| | | | | | | | | | | | | | | phydev->adjust_link() is called only from phy_update_status() when the link status changes during that function. phydev->link is also updated in genphy_update_link() called from phy_wait_aneg_done(), so it can happen that phydev->link changes outside of phy_update_status(), thus phydev->adjust_link is never called and no link change notice is printed. Instead of calling genphy_update_link() from phy_wait_aneg_done(), call phy_update_status(). This makes sure that a link change is properly noticed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: smc911x fix inverted wait_on_timeoutMike Nawrocki2021-02-011-1/+1
| | | | | | | | | | | | | The smc911x driver probe routine polls the READY bit using wait_on_timeout, which returns 0 on success. The error check following the wait_on_timeout invocation in the probe routine interprets a returned 0 as failure. This patch correctly interprets the return value of wait_on_timeout. Signed-off-by: Mike Nawrocki <michael.nawrocki@gtri.gatech.edu> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2021-01-191-2/+2
|\
| * net: mdio:gpio: fix typos in dev_dbgSteffen Trumtrar2021-01-071-2/+2
| | | | | | | | | | Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | net: phy: at803x: sync RX/TX delay setup with LinuxLucas Stach2021-01-061-12/+76
|/ | | | | | | | | The RX/TX delay setup was pretty broken in that it only handled one specific delay case. Sync the whole code with with the Linux driver to get correct and consistent behavior. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-11 13:23:33 +0000