| Commit message (Collapse) | Author | Age | Files | Lines |
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platform_driver/device_register
now register_driver and register_device are for bus only usage.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Conflicts:
drivers/net/miidev.c
include/miidev.h
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The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This has been tested by using UBI with a N25Q128 connected to
a TI McSPI controller.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch adds a SPI bus on which the SPI devices and drivers register.
This makes it cleaner as SPI devices won't accidently end up probed by
a platform_device driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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else when we do "erase /dev/m25p0.rootfs; reset", the board
will never reboot as the flash is busy to finish the erase
command.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The fast read command is needed for spi speeds > 25MHz, so use it for
higher speeds.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The driver currently erases blocks in 4kb chunks if 4kb support is
available. This patch uses bigger blocks for suitable areas to speed
up erasing areas.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The erase command normally makes sure that the selected area is erased,
therefore align the parameters to eraseblock boundaries.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Drivers should not print a progression bar.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is a first step for 64bit file support: Make the file sizes/offsets
64bit.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Linux Kernel defines only one of __LITTLE_ENDIAN and
__BIG_ENDIAN. Endianess can then be tested with #ifdef __xx_ENDIAN. Userspace
always defined both __LITTLE_ENDIAN and __BIG_ENDIAN and byteorder can then
be tested with #if __BYTE_ORDER == __xx_ENDIAN.
As we tend to use a lot of Kernel code in barebox we switch to use the kernel
way of determing the byte order.
As this always causes a lot of confusion add a check to include/common.h to
make sure only one of __LITTLE_ENDIAN and __BIG_ENDIAN is defined.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Show progressbar even when erasing just a single sector,
otherwise it looks as if erase didn't do anything.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Check for Ctrl-C before erasing each sector.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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"erase /dev/myflash0 0+1" erased the whole flash,
similar for other value of count if you guessed the
erae block size wrong.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is done to reduce the binary size a bit.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The intel cfi buffer write has a problem with writing when
the alignment of the buffer in memory is smaller than the
flash bus width.
This patch fixes a alignment problem which may show during this
scenario:
- 32 or 64 attached NOR flash
- flashing an image directly from network to the nor flash
The involved network driver is "smc9111.c".
The data that comes from the network stack and should be written into
the flash isn't 32 bit aligned (at least with this network driver).
This is probably due to the 48 bit wide ethernet addresses.
However the "cfi_flash.c" driver doesn't handle this situation, and
accesses the not-aligned address with a 32 bit pointer.
This patch fixes the problem by reducing the access width if an
aligment problem between source and destination is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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'reduce the number of loops by the width of the port' means
a simple len / width. Do not try to be clever by shifting
and doing it wrong.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is broken on big endian systems since:
943b271 cfi_flash: support of u32 cmd
I looked over it and I *think* that the function was correct
for both big and little endian systems before this patch.
To support u32 cmd we only have to change the data type of
the command from u8 to u32.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Teresa Gámez <t.gamez@phytec.de>
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So that the driver can work on big endian systems again
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some NOR flash chips have commands with length greater than the maximum
value size of uchar.
Based on an U-Boot Patch by Vasiliy Leoenenko <vasiliy.leonenko@mail.ru>
Only tested with little endian on an intel cfi_flash.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch adds the m25p80 driver. It has been ported from
Linux. MTD code has been removed. It has been tested with
a m25p40 chip and the Altera SPI master driver.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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This is the non invasive approach. All this type casting
shows this driver should be really cleaned up (or retired)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Write timeouts are expressed in microseconds. Milliseconds are 1000 times
longer than microseconds, not 1000 times shorter.
Before (Intel 28F128J3D75):
CFI conformant FLASH (16 x 16) Size: 16 MB in 128 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
Erase timeout: 4096 ms, write timeout: 256000 ms
Buffer write timeout: 1024000 ms, buffer size: 32 bytes
After:
...
Erase timeout: 4096 ms, write timeout: 256 us
Buffer write timeout: 1024 us, buffer size: 32 bytes
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The idea is to panic() when there is no memory available for normal
operation. Exception: code which can consume arbitrary amount of RAM
(example: files allocated in ramfs) must report error instead of panic().
This patch also fixes code which didn't check for NULL from malloc() etc.
Usage: malloc(), memalign() return NULL when out of RAM.
xmalloc(), xmemalign() always return non-NULL or panic().
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fix NOR CFI flash driver to work on big endian systems.
Basically this transforms the u8/u16/u32/u64 union into
a single u64 value.
Not tested on LE platform. Apply with caution.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Run fixups based on the JEDEC manufacturer ID independent of the
command set ID.
This changes current behaviour: Previously, geometry reversal for AMD
chips were done based on the command set ID, while they are now done
based on the JEDEC manufacturer and device ID.
Also add fixup for top-boot Atmel chips.
based on U-Boot
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Move fixing up like geometry reversal into separate functions.
The geometry reversal fixup is now performed
by altering the qry structure directly, which makes the sector init
code slightly cleaner.
based on U-Boot
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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The CFI flash driver starts at flash_init() which calls down into
flash_get_size(). This starts by calling flash_detect_cfi(). If said
function fails, flash_get_size() finishes by attempting to reset the
flash. Unfortunately, it does this with an info->portwidth set to 0x10
which filters down into flash_make_cmd() and that happily smashes the
stack by sticking info->portwidth bytes into a cfiword_t variable that
lives on the stack. On a 64bit system you probably won't notice, but
killing the last 8 bytes on a 32bit system usually leads to a corrupt
return address. Which is what happens on a Blackfin system.
based on U-Boot
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Read out the whole CFI Standard Query structure after successful cfi
identification. This allows subsequent code to access this information
directly without having to go through flash_read_uchar() and friends.
based on U-Boot
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Introduce flash_read{8,16,32,64) and flash_write{8,16,32,64} and use
them to access the flash memory. This makes it clearer when the flash
is actually being accessed; merely dereferencing a volatile pointer
looks just like any other kind of access.
based on U-Boot
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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several first banks can contain 0x7f instead of actual ID
support as done in linux
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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as we do not known which flash we have yet
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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it will reduce the binary size of 28 bytes
and fix some issue observerd during the porting of the at91rm9200ek
when reading the device_id and manufacturor_id
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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