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* nvmem: add read support for STM32MP1 bsec OTPAhmad Fatoum2019-11-063-1/+233
| | | | | | | | | The bsec on the STM32MP157C provides a 380 byte OTP. Add initial support for reading and writing the shadow copy of the fuses. Direct fuse access is not yet supported. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2019-10-171-2/+12
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| * nvmem: Fix read/write access to partition devicesStefan Riedmueller2019-10-141-2/+12
| | | | | | | | | | | | | | | | | | Partition devices are not directly associated with the nvmem instance but via their master cdev. Thus reading and writing needs to be handled via the master. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: ocotp: set unique id as machine-id hashableBastian Krause2019-09-301-0/+19
|/ | | | | | | | Pass the OCOTP unique id as hashable information to machine id generation. Signed-off-by: Bastian Krause <bst@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: Parse partitions informationAndrey Smirnov2019-08-141-1/+9
| | | | | | | | Add code to parse partition information that might be specified as a part of the DT config. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: Use already existing dev pointer in nvmem_register_cdev()Andrey Smirnov2019-08-141-1/+1
| | | | | | | There's already a struct device_d * pointer variable. Use it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: Use helper variable in nvmem_register_cdev()Andrey Smirnov2019-08-141-5/+6
| | | | | | | | Add struct cdev * helper variable to nvmem_register_cdev() in order to avoid repeating &nvmem->cdev a bunch of times Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: ocotp: Change TIMING calculation algorithmRouven Czerwinski2019-06-111-4/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Port of patch from linux-arm-kernel: | From: Bryan O'Donoghue <pure.logic@nexus-software.ie> | | nvmem: imx-ocotp: Change TIMING calculation to u-boot algorithm | | The RELAX field of the OCOTP block is turning out as a zero on i.MX8MM. | This messes up the subsequent re-load of the fuse shadow registers. | | After some discussion with people @ NXP its clear we have missed a trick | here in Linux. | | The OCOTP fuse programming time has a physical minimum 'burn time' that is | not related to the ipg_clk. | | We need to define the RELAX, STROBE_READ and STROBE_PROG fields in terms of | desired timings to allow for the burn-in to safely complete. Right now only | the RELAX field is calculated in terms of an absolute time and we are | ending up with a value of zero. | | This patch inherits the u-boot timings for the OCOTP_TIMING calculation on | the i.MX6 and i.MX8. Those timings are known to work and critically specify | values such as STROBE_PROG as a minimum timing. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: ocotp: Ensure WAIT bits are preservedRouven Czerwinski2019-06-111-1/+3
| | | | | | | | | | | | | | | | | | | | Port of patch from linux-arm-kernel: | From Bryan O'Donoghue <pure.logic@nexus-software.ie> | | nvmem: imx-ocotp: Ensure WAIT bits are preserved when setting timing | | The i.MX6 and i.MX8 both have a bit-field spanning bits 27:22 called the | WAIT field. | | The WAIT field according to the documentation for both parts "specifies | time interval between auto read and write access in one time program. It is | given in number of ipg_clk periods." | | This patch ensures that the relevant field is read and written back to the | timing register. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: ocotp: Elongate OCOTP_CTRL_ADDR fieldRouven Czerwinski2019-06-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | Port of patch from linux-arm-kernel: | From: Bryan O'Donoghue <pure.logic@nexus-software.ie> | | nvmem: imx-ocotp: Elongate OCOTP_CTRL ADDR field to eight bits | | i.MX6 defines OCOTP_CTRLn:ADDR as seven bit address-field with a one bit | RSVD0 field, i.MX7 defines OCOTP_CTRLn:ADDR as a four bit address-field | with a four bit RSVD0 field. | | i.MX8 defines the OCOTP_CTRLn:ADDR bit-field as a full range eight bits. | | i.MX6 and i.MX7 should return zero for their respective RSVD0 bits and | ignore a write-back of zero where i.MX8 will make use of the full range. | | This patch expands the bit-field definition for all users to eight bits, | which is safe due to RSVD0 being a no-op for the i.MX6 and i.MX7. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2019-02-131-4/+1
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| * nvmem: eeprom_93xx46: fix whitespacesAntony Pavlov2019-02-121-4/+1
| | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | devfs: Drop dev_lseek_default()Andrey Smirnov2019-01-291-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the following cdevs do not declare an .lseek() operation: - Console devices in common/console.c - Firmware framework in common/firmware.c - JTAG driver in drivers/misc/jtag.c - UBI in drivers/mtd/ubi/barebox.c Of those four, first two are marked DEVFS_IS_CHARACTER_DEV and implement only .write() operation and the last two don't implement anything but .ioctl(). While there's probably no meaningful way to use lseek() against any of those devices, there doesn't seem to be any harm in allowing it either. Change devfs_lseek() to ignore absense of .lseek() callback and drop dev_lseek_default() and all references to it in the codebase. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: Do not use DEVFS_IS_CHARACTER_DEVAndrey Smirnov2019-01-291-1/+0
|/ | | | | | | | | | There doesn't appear any good reason to mark NVMEM cdevs as DEVFS_IS_CHARACTER_DEV, since NVMEM devices should be able to read/write data at arbitrary offsets and are not different from any other cdevs representing non-volatile storage. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2019-01-151-8/+1
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| * nvmem: ocotp: Make use of postcore_platform_driver macroAndrey Smirnov2018-12-101-8/+1
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: ocotp: Fix writing of second mac address fuses on imx6ulStefan Riedmueller2019-01-031-2/+11
|/ | | | | | | | | | Commit 19a32c0f6bf0 ("nvmem: ocotp: Add support for second mac address fuses on imx6ul") added support for correctly reading the second MAC address from fuses of the i.MX 6UL/ULL but not for writing. So also fit writing of the second MAC address fuses to the correct method. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: ocotp: Add support for second mac address fuses on imx6ulChristian Hemp2018-12-051-2/+15
| | | | | | | | | | | | | | | | | | | | The i.MX 6UL/ULL has fuses for two MAC addresses. Both MAC addresses share the fuse address 0x23. ----------------------------- 0x22 | MAC0 | MAC0 | MAC0 | MAC0 | ----------------------------- 0x23 | MAC0 | MAC0 | MAC1 | MAC1 | ----------------------------- 0x24 | MAC1 | MAC1 | MAC1 | MAC1 | ----------------------------- So to read the second MAC address the first two bytes of 0x23 need to be skipped. Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/net-switch-mv88e6xxx'Sascha Hauer2018-11-092-2/+2
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| * drivers: Introduce dev_set_name()Andrey Smirnov2018-10-182-2/+2
| | | | | | | | | | | | | | | | Introduce dev_set_name() in order to hide implementation details of setting device's name so it'd be easier to change it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/missing-prototypes'Sascha Hauer2018-11-091-2/+2
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| * | nvmem: i.MX ocotp: Make locally used functions staticSascha Hauer2018-10-231-2/+2
| |/ | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / nvmem: Port Linux driver for Microwire 93XX46 EEPROM chipsAndrey Smirnov2018-11-063-1/+458
|/ | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx8mq'Sascha Hauer2018-07-091-0/+1
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| * ARM: i.MX: ocotp: Provide missing .format_mac for i.MX8MQSascha Hauer2018-06-151-0/+1
| | | | | | | | | | | | | | | | Provide missing .format_mac for i.MX8MQ to prevent driver from crashing on start. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: rave-sp-eeprom: Add support for "zii,eeprom-name"Andrey Smirnov2018-07-051-0/+5
| | | | | | | | | | | | | | | | | | | | Upstream kernel driver allows specifying EEPROM name via "zii,eeprom-name" property. Add code to support that in Barebox as well. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: rave-sp-eeprom: Remove VLA usageAndrey Smirnov2018-07-051-1/+5
| | | | | | | | | | | | | | | | | | | | This is a backport of patch [1] by Kees Cook [1] https://lkml.kernel.org/r/20180620182600.GA24297@beast Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: Introduce nvmem_cell_get_and_read()Andrey Smirnov2018-06-291-0/+23
| | | | | | | | | | | | | | | | | | Introduce nvmem_cell_get_and_read() that combines getting a NVMEM cell by name and reading its contents. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: Port RAVE SP EEPROM driver from Linux kernelAndrey Smirnov2018-06-213-1/+372
|/ | | | | | | | | This is a minimal port of a kernel commit 3b51f47be171 ("nvmem: Add RAVE SP EEPROM driver"). All of the changes were kept to a minimum and limited to impedance matching between Barebox/Linux driver API. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx-ocotp'Sascha Hauer2018-06-114-15/+720
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| * ARM: i.MX: ocotp: Add i.MX8MQ supportSascha Hauer2018-06-082-1/+11
| | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [andrew.smirnov@gmail.com: Rebased to account for move to nvmem] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * nvmem: ocotp: Convert to NVMEM deviceAndrey Smirnov2018-05-311-3/+35
| | | | | | | | | | | | | | | | | | | | | | | | Not that barebox has a proper NVMEM subsystem, convert OCOTP driver to use that to both make things more consistent with Linux and also allow accessing OCOTP fields without the need for imx_ocotp_read_field()/imx_ocotp_write_field(). Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * nvmem: Use name from struct nvmem_config for cdevAndrey Smirnov2018-05-311-15/+3
| | | | | | | | | | | | | | | | | | | | | | Original name, 'nvmemN', doesn't really give any hint about which physical HW it may represent, so change the code to either pick up an DT alias or use the name passed via 'struct nvmem_config'. Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: ocotp: Move OCOTP driver to drivers/nvmemAndrey Smirnov2018-05-313-0/+675
| | | | | | | | | | | | | | | | | | | | Move OCOTP driver to drivers/nvmem to be consistent with Linux kerenel. Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: snvs_lpgpr: Drop stray commasAndrey Smirnov2018-05-231-4/+4
|/ | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* rename file_operations -> cdev_operationsSascha Hauer2018-04-061-1/+1
| | | | | | | | Linux also has struct file_operations which are something different. Rename our file_operations to cdev_operations which better matches what we have. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* nvmem: snvs_lpgpr: sync with latest version for kernelOleksij Rempel2017-07-061-34/+62
| | | | | | | | DT format is ACKed now without "offset" parameter. Make sure barebox driver will work with it properly. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* nvmem: add snvs_lpgpr for freescale imx6Steffen Trumtrar2017-03-303-0/+129
| | | | | | | | | SNVS LPGPR is Non Volatile Low Power Generic Purpose Register which can be used as part of nvmem framework. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: add nvmem framework from kernelSteffen Trumtrar2017-03-303-0/+778
Add the nvmem framework from Linux. Based on the v4.4-rc3 version. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>