summaryrefslogtreecommitdiffstats
path: root/drivers/pci
Commit message (Expand)AuthorAgeFilesLines
...
* PCI: dwc: all: Split struct pcie_port into host-only and core structuresAndrey Smirnov2019-01-083-163/+196
* PCI: imx6: Remove LTSSM disable workaroundAndrey Smirnov2019-01-081-29/+28
* PCI: imx6: Remove redundant "Link never came up" messageAndrey Smirnov2019-01-081-3/+1
* PCI: imx6: Add DT property for link gen, default to Gen1Andrey Smirnov2019-01-081-7/+18
* PCI: imx6: Factor out ref clock enableAndrey Smirnov2019-01-081-14/+29
* PCI: imx6: Remove unused return valuesAndrey Smirnov2019-01-081-9/+4
* PCI: imx6: Port error messages for imx6_pcie_deassert_core_reset()Andrey Smirnov2019-01-081-3/+10
* PCI: imx6: Reorder struct imx6_pcieAndrey Smirnov2019-01-081-1/+1
* PCI: imx6: Use generic DesignWare accessorsAndrey Smirnov2019-01-081-66/+30
* PCI: imx6: Pass device-specific struct to internal functionsAndrey Smirnov2019-01-081-28/+25
* PCI: imx6: Pass struct imx6_pcie to PHY accessorsAndrey Smirnov2019-01-081-18/+23
* PCI: imx6: Removed unused struct imx6_pcie.mem_baseAndrey Smirnov2019-01-081-1/+0
* PCI: imx6: Add local struct device pointersAndrey Smirnov2019-01-081-7/+10
* PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init()Andrey Smirnov2019-01-081-5/+6
* PCI: dwc: all: Rename cfg_read/cfg_write to read/writeAndrey Smirnov2019-01-082-8/+8
* PCI: dwc: designware: Move register defines to designware header fileAndrey Smirnov2019-01-083-73/+78
* PCI: designware: Check for iATU unroll only on platforms that use ATUAndrey Smirnov2019-01-081-5/+5
* PCI: designware: Swap order of dw_pcie_writel_unroll() reg/val argumentsAndrey Smirnov2019-01-081-15/+15
* PCI: designware: Uninline register accessorsAndrey Smirnov2019-01-081-2/+2
* PCI: designware: Export dw_pcie_readl_rc(), dw_pcie_writel_rc()Andrey Smirnov2019-01-082-2/+4
* PCI: designware: Swap order of dw_pcie_writel_rc() reg/val argumentsAndrey Smirnov2019-01-082-24/+24
* PCI: designware: Simplify pcie_host_ops.readl_rc() and .writel_rc() interfacesAndrey Smirnov2019-01-082-5/+4
* PCI: designware: Simplify dw_pcie_readl_unroll(), dw_pcie_writel_unroll()Andrey Smirnov2019-01-081-8/+2
* PCI: designware: Rename dw_pcie_valid_config() to dw_pcie_valid_device()Andrey Smirnov2019-01-081-4/+4
* PCI: designware: Exchange viewport of `MEMORYs' and `CFGs/IOs'Andrey Smirnov2019-01-081-5/+5
* PCI: designware: Keep viewport fixed for IO transaction if num_viewport > 2Andrey Smirnov2019-01-082-7/+20
* PCI: designware: Check LTSSM training bit before deciding link is upAndrey Smirnov2019-01-081-2/+4
* PCI: designware: Add iATU Unroll featureAndrey Smirnov2019-01-082-11/+91
* PCI: designware: Wait for iATU enableAndrey Smirnov2019-01-081-2/+13
* PCI: designware: Move link wait definitions to .c fileAndrey Smirnov2019-01-082-4/+4
* PCI: designware: Return data directly from dw_pcie_readl_rc()Andrey Smirnov2019-01-082-11/+10
* PCI: designware: Remove incorrect RC memory base/limit configurationAndrey Smirnov2019-01-081-8/+0
* PCI: designware: Move Root Complex setup code to dw_pcie_setup_rc()Andrey Smirnov2019-01-081-20/+20
* PCI: designware: Add default link up check if sub-driver doesn't overrideAndrey Smirnov2019-01-081-1/+9
* PCI: designware: Add generic dw_pcie_wait_for_link()Andrey Smirnov2019-01-083-29/+25
* PCI: imx6: Move link up check into imx6_pcie_wait_for_link()Andrey Smirnov2019-01-081-1/+19
* PCI: designware: Explain why we don't program ATU for some platformsAndrey Smirnov2019-01-081-0/+5
* PCI: designware: Make config accessor override checking symmetricAndrey Smirnov2019-01-081-7/+8
* PCI: designware: Simplify control flowAndrey Smirnov2019-01-081-32/+21
* PCI: designware: Ensure ATU is enabled before IO/conf space accessesAndrey Smirnov2019-01-081-0/+8
* PCI: designware: Make "num-lanes" an optional DT propertyAndrey Smirnov2019-01-081-5/+7
* PCI: designware: Require config accesses to be naturally alignedAndrey Smirnov2019-01-081-0/+8
* PCI: designware: Simplify dw_pcie_cfg_read/write() interfacesAndrey Smirnov2019-01-082-16/+15
* PCI: designware: Use exact access size in dw_pcie_cfg_read()Andrey Smirnov2019-01-081-6/+8
* PCI: designware: Fix PORT_LOGIC_LINK_WIDTH_MASKAndrey Smirnov2019-01-081-1/+1
* PCI: designware: Use iATU0 for cfg and IO, iATU1 for MEMAndrey Smirnov2019-01-081-33/+46
* PCI: designware: Consolidate outbound iATU programming functionsAndrey Smirnov2019-01-081-78/+43
* PCI: desginware: Remove bogus prototypesAndrey Smirnov2019-01-081-2/+0
* drivers: Introduce dev_set_name()Andrey Smirnov2018-10-181-2/+1
* pci_of_match_device: don't crash on MIPS MaltaAntony Pavlov2018-09-171-1/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-19 01:01:38 +0000