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* sizes.h: move include/sizes.h to include/linux/sizes.hMasahiro Yamada2015-01-083-3/+3
| | | | | | | | | | | | | | This file originates in Linux. Linux has it under include/linux/ directory since commit dccd2304cc90. Let's move it to the same place as well in barebox. This commit was generated by the following commands: find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:' git mv include/sizes.h include/linux/ Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: tegra: relax link-up timeoutLucas Stach2014-11-171-1/+1
| | | | | | | | | | Some devices need a considerable amount of time from reset deassertion until they are ready to establish a link. Relaxing the link-up timeout helps to detect them more reliable. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: align bridge windowsLucas Stach2014-11-171-0/+4
| | | | | | | | | | | The bridge filtering logic needs a minimum alignment of 1MB for mem and 4KB for io resources. Take this into account while assigning resources to devices in oredr to not produce overlapping windows between different bridges. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: correct BAR size calculationLucas Stach2014-11-171-3/+3
| | | | | | | | The previous math would return negative sizes for some BARs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: mvebu: Fix uninitialized variable in mvebu_get_target_attr()Thomas Petazzoni2014-11-101-3/+3
| | | | | | | | | | This is the same fix that was applied to the Linux kernel in commit 56fab6e18944 (PCI: mvebu: Fix uninitialized variable in mvebu_get_tgt_attr()). Fixes: 5a9ba98 ("pci: mvebu: Add PCIe driver") Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: tegra: add tegra124 supportLucas Stach2014-11-041-22/+134
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: add Tegra host controller driverLucas Stach2014-10-083-0/+1201
| | | | | | | Only tested on Tegra30 for now. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: track parent<->child relationshipLucas Stach2014-10-081-0/+4
| | | | | | | | | So that PCI devices hang down from bridges and root bridges down from the PCI host controller when calling devinfo. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: prettyprint device namesLucas Stach2014-10-081-1/+2
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: defer device registration until after bridge setupLucas Stach2014-10-081-1/+5
| | | | | | | | | Otherwise the drivers for a device may probe before the devices parent bridge is fully configured, which leads to errors when accessing the BARs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: setup bridges and traverse buses behind themLucas Stach2014-10-081-3/+89
| | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: properly populate prefetchable BARsLucas Stach2014-10-081-14/+45
| | | | | | | | | Some host controllers provide a prefetchable memory area and devices will prefer this for some of their BARs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: add resource enumLucas Stach2014-10-081-6/+8
| | | | | | | Makes things way clearer than juggling numbers. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: split out device initLucas Stach2014-10-081-63/+74
| | | | | | | To make it reusable and the code more readable. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: mvebu: Add PCIe driverSebastian Hesselbarth2014-07-315-0/+699
| | | | | | | | | | This adds a PCI driver for the controllers found on Marvell MVEBU SoCs. Besides the functional driver itself, it also adds SoC specific PHY setup required for PCIe. Currently, only Armada 370 is fully supported. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: set auto-incremented bus numberSebastian Hesselbarth2014-07-311-0/+5
| | | | | | | | | | | | | | | When using more than one PCI bus, we have to assign unique numbers to each bus. Use an auto-incremented bus index and assign it to each registered bus. Also, allow the PCI host controller to update internal registers by calling set_busno with assigned bus number. While at it, add pci_controller struct to set_busno callback, add a back reference to pci_controller to pci_bus, and clean up unused left-overs from Linux import. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: ensure device does ignore BAR manglingSebastian Hesselbarth2014-07-311-0/+5
| | | | | | | | | Disable access to PCI devices I/O and memory regions while mangling BAR registers. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: register device after BAR setupSebastian Hesselbarth2014-07-311-3/+3
| | | | | | | | | | As soon as pci_register_device is called, a potential driver will access its registers. This requires BARs to be set up properly, so move pci_register_device after BAR setup. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: pci_scan_bus: respect 64b BARsSebastian Hesselbarth2014-07-311-1/+11
| | | | | | | | | | | In PCI 64-bit BARs span two 32-bit BARs, therefore if BAR type indicates a 64-bit BAR we have to skip the next BAR register. While at it, also set proper IORESOURCE flags for I/O and 32b MEM. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pci: pci_alloc_bus(): use xzalloc() instead of kzalloc()Antony Pavlov2014-07-091-8/+8
| | | | | | | | Also drop redundant xzalloc() result check as xzalloc() does not return in case of memory allocation error. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* PCI: initial commitAntony Pavlov2014-07-045-0/+468
used shorten version of linux-2.6.39 pci_ids.h Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-28 06:06:56 +0000