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path: root/drivers/pci
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* PCI: imx6: Port imx6_pcie_ltssm_enable()Andrey Smirnov2019-01-181-9/+18
* PCI: imx6: Drop unnecessary root_bus_nr settingAndrey Smirnov2019-01-181-1/+0
* PCI: imx6: Fix spelling mistake: "contol" -> "control"Andrey Smirnov2019-01-181-2/+2
* PCI: imx6: Do not switch speed if Gen2 is disabledAndrey Smirnov2019-01-181-27/+28
* PCI: imx6: Do not wait for speed change on i.MX7Andrey Smirnov2019-01-181-4/+15
* PCI: imx6: Allow probe deferral by reset GPIOAndrey Smirnov2019-01-181-8/+11
* PCI: imx6: Add code to support i.MX7DAndrey Smirnov2019-01-182-46/+124
* PCI: dwc: Constify dw_pcie_host_ops structuresAndrey Smirnov2019-01-082-2/+2
* PCI: dwc: Small computation improvementAndrey Smirnov2019-01-081-4/+4
* PCI: dwc: Fix enumeration end when reaching root subordinateAndrey Smirnov2019-01-081-1/+1
* PCI: dwc: Enable write permission for Class Code, Interrupt Pin updatesAndrey Smirnov2019-01-081-1/+5
* PCI: dwc: Add accessors for write permission of DBIAndrey Smirnov2019-01-081-0/+26
* PCI: dwc: designware: Handle ->host_init() failuresAndrey Smirnov2019-01-083-4/+9
* PCI: dwc: Replace lower into upper case charactersAndrey Smirnov2019-01-082-14/+14
* PCI: Add SPDX GPL-2.0 to replace GPL v2 boilerplateAndrey Smirnov2019-01-088-40/+8
* PCI: Fix typos and whitespace errorsAndrey Smirnov2019-01-083-3/+3
* PCI: dwc: designware: Make dw_pcie_prog_*_atu_unroll() staticAndrey Smirnov2019-01-081-3/+3
* PCI: dwc: designware: Test PCIE_ATU_ENABLE bit specificallyAndrey Smirnov2019-01-081-1/+1
* PCI: dwc: designware: Move _unroll configurations to a separate functionAndrey Smirnov2019-01-081-39/+59
* PCI: dwc: all: Modify dbi accessors to access data of 4/2/1 bytesAndrey Smirnov2019-01-082-14/+31
* PCI: dwc: all: Modify dbi accessors to take dbi_base as argumentAndrey Smirnov2019-01-082-10/+22
* PCI: dwc: Split pcie-designware.c into host and core filesAndrey Smirnov2019-01-084-383/+422
* PCI: dwc: designware: Fix style errors in pcie-designware.cAndrey Smirnov2019-01-081-12/+12
* PCI: dwc: designware: Parse "num-lanes" property in dw_pcie_setup_rc()Andrey Smirnov2019-01-082-8/+11
* PCI: dwc: all: Split struct pcie_port into host-only and core structuresAndrey Smirnov2019-01-083-163/+196
* PCI: imx6: Remove LTSSM disable workaroundAndrey Smirnov2019-01-081-29/+28
* PCI: imx6: Remove redundant "Link never came up" messageAndrey Smirnov2019-01-081-3/+1
* PCI: imx6: Add DT property for link gen, default to Gen1Andrey Smirnov2019-01-081-7/+18
* PCI: imx6: Factor out ref clock enableAndrey Smirnov2019-01-081-14/+29
* PCI: imx6: Remove unused return valuesAndrey Smirnov2019-01-081-9/+4
* PCI: imx6: Port error messages for imx6_pcie_deassert_core_reset()Andrey Smirnov2019-01-081-3/+10
* PCI: imx6: Reorder struct imx6_pcieAndrey Smirnov2019-01-081-1/+1
* PCI: imx6: Use generic DesignWare accessorsAndrey Smirnov2019-01-081-66/+30
* PCI: imx6: Pass device-specific struct to internal functionsAndrey Smirnov2019-01-081-28/+25
* PCI: imx6: Pass struct imx6_pcie to PHY accessorsAndrey Smirnov2019-01-081-18/+23
* PCI: imx6: Removed unused struct imx6_pcie.mem_baseAndrey Smirnov2019-01-081-1/+0
* PCI: imx6: Add local struct device pointersAndrey Smirnov2019-01-081-7/+10
* PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init()Andrey Smirnov2019-01-081-5/+6
* PCI: dwc: all: Rename cfg_read/cfg_write to read/writeAndrey Smirnov2019-01-082-8/+8
* PCI: dwc: designware: Move register defines to designware header fileAndrey Smirnov2019-01-083-73/+78
* PCI: designware: Check for iATU unroll only on platforms that use ATUAndrey Smirnov2019-01-081-5/+5
* PCI: designware: Swap order of dw_pcie_writel_unroll() reg/val argumentsAndrey Smirnov2019-01-081-15/+15
* PCI: designware: Uninline register accessorsAndrey Smirnov2019-01-081-2/+2
* PCI: designware: Export dw_pcie_readl_rc(), dw_pcie_writel_rc()Andrey Smirnov2019-01-082-2/+4
* PCI: designware: Swap order of dw_pcie_writel_rc() reg/val argumentsAndrey Smirnov2019-01-082-24/+24
* PCI: designware: Simplify pcie_host_ops.readl_rc() and .writel_rc() interfacesAndrey Smirnov2019-01-082-5/+4
* PCI: designware: Simplify dw_pcie_readl_unroll(), dw_pcie_writel_unroll()Andrey Smirnov2019-01-081-8/+2
* PCI: designware: Rename dw_pcie_valid_config() to dw_pcie_valid_device()Andrey Smirnov2019-01-081-4/+4
* PCI: designware: Exchange viewport of `MEMORYs' and `CFGs/IOs'Andrey Smirnov2019-01-081-5/+5
* PCI: designware: Keep viewport fixed for IO transaction if num_viewport > 2Andrey Smirnov2019-01-082-7/+20
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