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* pinctrl: stm32: parse pinctrl nodes without subnodes as wellAhmad Fatoum2019-11-061-81/+99
| | | | | | | | | The bindings allow the pinmux node to occur directly in the node under the pin controller as well. Check for this and support both types of pinctrl specification. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: demote dev_info on successful probes to dev_dbgAhmad Fatoum2019-11-063-4/+4
| | | | | | | | | | | | | The SoC's pin controller is virtually always built and probed, so there's is little information to gain from the fact it was successfully probed. Have the success message show up as debug message to reduce probe clutter like this: NOTICE: stm32-pinctrl soc:pin-controller@50002000.of: pinctrl/gpio driver registered NOTICE: stm32-pinctrl soc:pin-controller-z@54004000.of: pinctrl/gpio driver registered Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: stm32: fix debug print of uninitialized variableAhmad Fatoum2019-11-061-3/+3
| | | | | | | | mode and alt are printed with the dev_dbg before they are initialized. Remedy this by moving the dev_dbg after them. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: add gpio and pinctrl driver for sama5d2 PIO4Ahmad Fatoum2019-10-144-0/+333
| | | | | | | | | | | | The sama5d2 features a GPIO and pin controller different than the one we support in barebox. The device tree bindings are different as well, so it makes sense to have a separate driver for it. Add the pin control and GPIO driver as well as some helpers usable from PBL, should we want to do pinmuxing that early. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: i.MX iomux-v1: Add i.MX1 supportSascha Hauer2019-08-141-0/+2
| | | | | | This adds the device tree compatible for the i.MX1 iomux. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: i.MX iomux-v1: Make base address initialization unnecessarySascha Hauer2019-08-142-19/+11
| | | | | | | | | | | | So far we have imx_gpio_mode() to configure a pinmux entry for the older i.MX pinmuxes. For this to work imx_iomuxv1_init() must be called beforehand to configure the base address. Simplify this by introducing SoC specific variants of imx_gpio_mode() which also pass the base address. This makes initialization of the base address unnecessary and the functions usable for PBL. Consequently also compile the code for PBL. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: stm32: fix error path when gpio chip is not foundAhmad Fatoum2019-07-091-2/+3
| | | | | | | | | | | | | | | Current error path has two issues: - PTR_ERR is applied to a NULL pointer, so even error conditions return zero, which is a valid successful return. - The return value is stored into an unsigned integer which is checked to be less than zero, so the error is never handled. Fix both issues. Fixes: f4f933a64 ("pinctrl: add driver for STM32 GPIO and pin multiplexer") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: stm32: add debug output in set_state callbackAhmad Fatoum2019-07-091-0/+3
| | | | | | | | | There's already a debug output whenever a pin is configured, extend this by printing a "header" with the node name and how many pins configurations will follow. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: add driver for STM32 GPIO and pin multiplexerAhmad Fatoum2019-06-203-0/+432
| | | | | | | | | | | | | This adds driver support for the 12 GPIO banks on the STM32MP157. As they are accessible to both the Cortex-A cores as well as the Cortex-M core, modifications to these are protected by a hardware spinlock and clocks are enabled/disabled as required. All register fiddling done by the driver is collected in <soc/stm32/gpio.h>, so future PBL code may make use of it as well to chainload barebox proper. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writelAhmad Fatoum2019-05-241-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Use the potentially endianness-changing readl, writel and siblings directly. They looks prettier and are the correct thing to do, as even if the CPU is in big-endian mode, the peripherals are little-endian. Unlike Linux, barebox readl,writel are the same Linux' {readl,writel}_relaxed (they don't imply memory barriers) and thus there shouldn't be any functional change. Patch was generated by a mass search and replace. I looked it over, adjust some whitespace and further verified by reviewing the output of git diff HEAD~1 --word-diff | \ perl -pe 's/\[-(.*?)__raw_/{+$1/; s/-\]\{\+/+}{+/;' \ -e 's/(\{\+.*?\+\})\1/__ALL_IS_WELL__/' | grep '+}{+' which filters out the common case of lines where a single __raw_{readT,writeT} had its __raw_ prefix stripped without any further changes. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Tested-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: surround Kconfig file paths with double quotesMasahiro Yamada2019-03-211-1/+1
| | | | | | | | | Based on Linux commit 8636a1f9677db4f883f29a072f401303acfc2edd This will be needed when you sync Kconfig with Linux 5.0 or later. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: bcm2835: register the pin controller.Tomaz Solc2019-02-191-1/+51
| | | | | | | This adds hooks for the pin controller driver to the existing bcm2835_set_function(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: bcm2835: move existing code from gpio.Tomaz Solc2019-02-193-0/+169
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig: add pin controllers submenu.Tomaz Solc2019-02-191-0/+4
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: imx-v3: imx8mq does use the old bindingLucas Stach2019-01-151-4/+0
| | | | | | | | The upstream discussion concluded on using the same binding as on previous i.MX SoCs. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/missing-prototypes'Sascha Hauer2018-12-071-8/+1
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| * pinctrl: at91: Add missing includeSascha Hauer2018-11-121-8/+1
| | | | | | | | | | | | | | | | mach/iomux.h provides prototypes for functions that the pinctrl driver implements, so include it. With this we have a duplicate definition of enum at91_mux so remove it from the pinctrl driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | pinctrl: tegra30: fix "Possible null pointer dereference: group" warningOleksij Rempel2018-11-211-2/+2
|/ | | | | | | | The code is correct but it takes more seconds for me to understand. And static code analyzer do not understand it at all. Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2018-11-091-2/+2
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| * pinctrl: at91: Do not print registration messagesSascha Hauer2018-11-021-2/+2
| | | | | | | | | | | | Turn registration messages into dev_dbg. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | pinctrl: tree-wide probe devices during core_initcallMarco Felsch2018-10-1914-15/+15
|/ | | | | | | | | | | | | Since commit 37e6bee7e5 ("gpiolib: Add support for GPIO "hog" nodes") barebox can handle hog-gpios. To work correctly the pinctrl driver must be initialised first. Reorder all pinctrl drivers so they will be called first. find drivers/pinctrl/ -type f -name *.c \ -exec sed -i 's/\bpostcore_initcall\b/core_initcall/' "{}" +; Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: imx-iomux-v3: fix compiler warningRoland Hieber2018-09-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Fix a warning while compiling with GCC 5.4.0 (OSELAS.Toolchain 2016.02): drivers/pinctrl/imx-iomux-v3.c: In function 'imx_iomux_v3_set_state': drivers/pinctrl/imx-iomux-v3.c:153:13: warning: 'share_conf_val' may be used uninitialized in this function [-Wmaybe-uninitialized] conf_val &= ~IMX_PAD_SION; we have the pattern: if (share_conf) share_conf_val = ...; ... if (share_conf) use(share_conf_val); GCC 5.4.0 doesn't recognize this so explicitly initialize share_conf_val. Signed-off-by: Roland Hieber <rohieb@rohieb.name> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: i.MX: Add code to parse "input-enable"Andrey Smirnov2018-08-131-0/+3
| | | | | | | | Add code to parse "input-enable" and intepret it as SION bit. This is needed for I2C configuration on i.MX8MQ EVK board. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: i.MX: Add support for i.MX8Andrey Smirnov2018-06-111-6/+50
| | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl-vf610: Make use of BIT macroAndrey Smirnov2018-04-111-3/+3
| | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: do not dereference a device tree property directlySascha Hauer2018-01-311-12/+6
| | | | | | | Use of_get_property() rather than of_find_property() to avoid dereferencing a struct property directly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* remove checks for xzalloc() returning NULLUwe Kleine-König2017-09-261-2/+0
| | | | | | | xzalloc() either returns memory or panics, so checking for NULL is useless. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: mxs: fix error message to mention right property nameUwe Kleine-König2017-09-261-1/+1
| | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: at91: move initcalls to postcore_initcallSam Ravnborg2017-07-201-2/+2
| | | | | | | | | | Move initcalls to postcore_initcall() like all other pinctrl drivers. This will init this driver earlier right after pinctrl driver. No know bugs are fixed by this change. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* pinctrl: at91: Bail out if atmel,pins property does not existSascha Hauer2017-06-271-0/+3
| | | | | | | | Do not blindly assume that a device node has a atmel,pins property. Instead, test it for being NULL before using it. This also silences a compiler warning when the driver is compiled without OF support. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: at91: Implement .get_direction hookAndrey Smirnov2017-03-091-0/+16
| | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: at91: Fix a bug in at91_pinctrl_set_state()Andrey Smirnov2017-03-091-0/+2
| | | | | | | | | | | Pin number, as specified in OF pinumx entries, is relative to each bank start, whereas both at91_mux_pin() and at91_pinctrl_set_conf() asssume absolute pin numbering, so we need to take into account each bank's pin base and convert pin number appropriately. Failing to do so results in any pinmux configuration being applied to pins in bank A. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: at91: Fix a bug in at91_pinctrl_set_conf()Andrey Smirnov2017-03-091-1/+3
| | | | | | | | | Pin_to_controller returns struct at91_gpio_chip, whereas at91_mux_* functions expect void __iomem * pointing to controller register window. Fix the code to do appropriate conversion between the two. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: i.MX7: Fix LPSR sel_imput settingSascha Hauer2017-02-061-1/+1
| | | | | | | | | | | | | | | | The i.MX7 has two pinmux controllers, the regular and the LPSR controller. The LPSR pinmux controller doesn't have any sel_input registers, instead they can be found in the regular pinmux controller. This means whenever we want to apply the the sel_input setting for the LPSR controller, we have to apply them to the regular controller instead. In barebox take the easy way out and just add the difference of the two base addresses to the register offset. The same issue is present in the Kernel aswell, but when the bootloader already configured the pins correctly nobody notices when the Kernel sel_input setup effectively is a no-op. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX: Add i.MX6SL supportAlexander Kurz2017-02-021-0/+2
| | | | | | | | | | | | | Most i.MX6SL infrastructure is already covered in barebox by general i.MX6 support. Missing infrastructure provided in separate commits are * SoC type detection * Clock infrastructure Add the missing fsl,imx6sl-mmdc, so it will not be catched by fsl,imx6q-mmdc and the remaining bits and pieces to provide barebox i.MX6SL SoC support. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinmmux: i.MX: add pin mux support for i.MX7Juergen Borleis2017-01-201-8/+32
| | | | | Signed-off-by Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: vf610: Add low-level pin configuration helperAndrey Smirnov2017-01-121-5/+6
| | | | | | | | Add low-level pin configuration helper for early boot code, and convert pinctrl driver to use that code as well. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: iomuxv3: Use helper functions in iomux-v3.hAndrey Smirnov2017-01-121-34/+4
| | | | | | | Avoid code duplication by using helper functions from iomux-v3.h Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/vybrid'Sascha Hauer2016-11-144-0/+218
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| * i.MX: Add pinctrl driver for VF610Andrey Smirnov2016-11-143-0/+173
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * pinctrl: Add provisions to control GPIO pin directionAndrey Smirnov2016-11-141-0/+45
| | | | | | | | | | | | | | | | | | | | Some SoC (of which Vybrid is a one example) relegate GPIO direction control to their pinmux IP block, instead of having that functionality within GPIO IP. Add provisions to control that aspect of pinmux to support such SoCs. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/mvebu'Sascha Hauer2016-11-142-57/+60
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| * | pinctrl: mvebu: fix a comment about mv78460Uwe Kleine-König2016-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | It's pin mpp57 that has function vdd/cpu2-3-pd Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | pinctrl: mvebu: sync mpp names to Linux 4.9-rc1Uwe Kleine-König2016-10-192-56/+59
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux changed several mpp names in commits: 438881dfddb9 (pinctrl: mvebu: armada-370: fix spi0 pin description) bc99357f3690 (pinctrl: mvebu: armada-xp: remove non-existing NAND pins) 80b3d04feab5 (pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions) 100dc5d84095 (pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions) 7bd6a26db6f9 (pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins) dae5597f253a (pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins) d4974c16ed22 (pinctrl: mvebu: armada-{370,375}: normalize PCIe pins) f32f01e1ba6b (pinctrl: mvebu: armada-{370,375}: normalize audio pins) a361cbc575d6 (pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins) bfacb5669474 (pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet) 9e05db29e2ac (pinctrl: mvebu: armada-370: align spi1 clock pin naming) 50a7d13d2410 (pinctrl: mvebu: armada-xp: rename spi to spi0) 88b355f1e4e5 (pinctrl: mvebu: armada-xp: add spi1 function) fb53b61d7768 (pinctrl: mvebu: armada-xp: add nand rb function) b19bf3797679 (pinctrl: mvebu: armada-xp: add dram functions) Adapt the barebox mvebu drivers accordingly. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2016-11-141-0/+2
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| * pinmux: imx-iomux-v3: Add i.MX6ul supportSascha Hauer2016-11-081-0/+2
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | pinctrl: mvebu: armada-370 fix gpio name for mpp63Uwe Kleine-König2016-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It was found that pin 63 also works as input and so the respective function is renamed from "gpo" to "gpio". The respective commit in Linux is: a526973e0291 ("pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)") which appeared in v4.1-rc3. The devicetrees are fixed accordingly since commit ce5cad51f381 ("ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370") which appeared in v4.6-rc1. This fixes a runtime warning on the affected machines (globalscale-mirabox and netgear-rn104) and makes the pin functional again. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | pinctrl: mvebu: add newline to error messageUwe Kleine-König2016-10-041-1/+2
|/ | | | | Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pinctrl: iomux-v3: Cleaning SION patch before applyingAlexander Shiyan2016-05-311-1/+3
| | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2016-05-091-2/+2
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