| Commit message (Collapse) | Author | Age | Files | Lines |
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The i.MX7 has two pinmux controllers, the regular and the LPSR
controller. The LPSR pinmux controller doesn't have any sel_input
registers, instead they can be found in the regular pinmux controller.
This means whenever we want to apply the the sel_input setting for
the LPSR controller, we have to apply them to the regular controller
instead.
In barebox take the easy way out and just add the difference of the
two base addresses to the register offset. The same issue is present
in the Kernel aswell, but when the bootloader already configured
the pins correctly nobody notices when the Kernel sel_input setup
effectively is a no-op.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Most i.MX6SL infrastructure is already covered in barebox by general i.MX6
support. Missing infrastructure provided in separate commits are
* SoC type detection
* Clock infrastructure
Add the missing fsl,imx6sl-mmdc, so it will not be catched by fsl,imx6q-mmdc
and the remaining bits and pieces to provide barebox i.MX6SL SoC support.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add low-level pin configuration helper for early boot code, and convert
pinctrl driver to use that code as well.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Avoid code duplication by using helper functions from iomux-v3.h
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some SoC (of which Vybrid is a one example) relegate GPIO direction
control to their pinmux IP block, instead of having that functionality
within GPIO IP. Add provisions to control that aspect of pinmux to
support such SoCs.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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It's pin mpp57 that has function vdd/cpu2-3-pd
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Linux changed several mpp names in commits:
438881dfddb9 (pinctrl: mvebu: armada-370: fix spi0 pin description)
bc99357f3690 (pinctrl: mvebu: armada-xp: remove non-existing NAND pins)
80b3d04feab5 (pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions)
100dc5d84095 (pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions)
7bd6a26db6f9 (pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins)
dae5597f253a (pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins)
d4974c16ed22 (pinctrl: mvebu: armada-{370,375}: normalize PCIe pins)
f32f01e1ba6b (pinctrl: mvebu: armada-{370,375}: normalize audio pins)
a361cbc575d6 (pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins)
bfacb5669474 (pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet)
9e05db29e2ac (pinctrl: mvebu: armada-370: align spi1 clock pin naming)
50a7d13d2410 (pinctrl: mvebu: armada-xp: rename spi to spi0)
88b355f1e4e5 (pinctrl: mvebu: armada-xp: add spi1 function)
fb53b61d7768 (pinctrl: mvebu: armada-xp: add nand rb function)
b19bf3797679 (pinctrl: mvebu: armada-xp: add dram functions)
Adapt the barebox mvebu drivers accordingly.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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It was found that pin 63 also works as input and so the respective function
is renamed from "gpo" to "gpio". The respective commit in Linux is:
a526973e0291 ("pinctrl: mvebu: Fix mapping of pin 63 (gpo -> gpio)")
which appeared in v4.1-rc3. The devicetrees are fixed accordingly since
commit
ce5cad51f381 ("ARM: dts: armada-370: Update the mpp63 function in the device tree on Armada 370")
which appeared in v4.6-rc1.
This fixes a runtime warning on the affected machines
(globalscale-mirabox and netgear-rn104) and makes the pin functional
again.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Not sure this is of general interest, but it helped me matching pin
configs from a static table to device tree entries.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Our asprintf and vasprintf have different prototypes than the glibc
functions. This causes trouble when we want to share barebox code
with userspace code. Change the prototypes for (v)asprintf to match
the glibc prototypes. Since the current (v)asprintf are convenient
to use change the existing functions to b(v)asprintf.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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dev_request_mem_region doesn't work properly one some SoCs on which
PTR_ERR() values clash with valid return values from dev_request_mem_region.
Replace them with dev_request_mem_resource where possible.
This patch has been generated with the following semantic patch:
// <smpl>
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores)) {
...
- return PTR_ERR(io);
-}
+ return PTR_ERR(iores);
+}
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores))
- return PTR_ERR(io);
-}
+ return PTR_ERR(iores);
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
-if (IS_ERR(io)) {
- ret = PTR_ERR(io);
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores)) {
+ ret = PTR_ERR(iores);
...
}
+io = IOMEM(iores->start);
...+>
}
@@
expression d;
expression n;
expression io;
identifier func;
@@
func(...) {
+struct resource *iores;
<+...
-io = dev_request_mem_region(d, n);
+iores = dev_request_mem_resource(d, n);
+if (IS_ERR(iores))
+ return PTR_ERR(iores);
+io = IOMEM(iores->start);
...+>
}
@@
identifier func;
@@
func(...) {
<+...
struct resource *iores;
-struct resource *iores;
...+>
}
// </smpl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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dev_request_mem_region returns an ERR_PTR, fix places which check for a
NULL pointer instead. This patch has been generated with this semantic
patch, written by me and improved by Andrey Smirnov:
// <smpl>
@@
expression e;
expression e1;
@@
e = dev_request_mem_region(...);
...
-if (!e)
- return e1;
+if (IS_ERR(e))
+ return PTR_ERR(e);
@ rule1 @
expression e;
@@
e = dev_request_mem_region(...);
@@
expression rule1.e;
identifier ret, label;
constant errno;
@@
if (!e) {
...
(
- ret = -errno;
+ ret = PTR_ERR(e);
...
goto label;
|
- return -errno;
+ return PTR_ERR(e);
)
}
@depends on rule1@
expression rule1.e;
@@
- if (e == NULL)
+ if (IS_ERR(e))
{
...
}
// </smpl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
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The functions have been renamed, but this has not been reflected in the
EXPORT_SYMBOL macros. Do that now.
Fixes several errors like this:
drivers/pinctrl/imx-iomux-v2.c:61:15: error:
'mxc_iomux_mode' undeclared here (not in a function)
EXPORT_SYMBOL(mxc_iomux_mode);
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since 2011 barebox' of_device_id struct uses unsigned long type for data field:
struct of_device_id {
char *compatible;
unsigned long data;
};
Almost always struct of_device_id.data field are used as pointer
and need 'unsigned long' casting.
E.g. see 'git grep -A 4 of_device_id drivers/' output:
drivers/ata/sata-imx.c:static __maybe_unused struct of_device_id imx_sata_dt_ids[] = {
drivers/ata/sata-imx.c- {
drivers/ata/sata-imx.c- .compatible = "fsl,imx6q-ahci",
drivers/ata/sata-imx.c- .data = (unsigned long)&data_imx6,
drivers/ata/sata-imx.c- }, {
Here is of_device_id struct in linux kernel v4.0:
struct of_device_id {
char name[32];
char type[32];
char compatible[128];
const void *data;
};
Changing of_device_id.data type to 'const void *data' will increase
barebox' linux kernel compatibility and decrease number of 'unsigned
long' casts.
Part of the patch was done using the 'coccinelle' tool with the
following semantic patch:
@rule1@
identifier dev;
identifier type;
identifier func;
@@
func(...) {
<...
- dev_get_drvdata(dev, (unsigned long *)&type)
+ dev_get_drvdata(dev, (const void **)&type)
...>
}
@rule2@
identifier dev;
identifier type;
identifier func;
identifier data;
@@
func(...) {
<...
- dev_get_drvdata(dev, (unsigned long *)&type->data)
+ dev_get_drvdata(dev, (const void **)&type->data)
...>
}
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds a device tree pinctrl driver for MXS.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The file drivers/pinctrl/pinctrl.c is compiled only when
CONFIG_PINCTRL is defined. "IS_ENABLED(CONFIG_PINCTRL)" is
always evaluated as 1 in this function.
(Although the compiler would optimize it, the source file does
not look nice.)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This file originates in Linux. Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.
This commit was generated by the following commands:
find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
git mv include/sizes.h include/linux/
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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broken since
commit ed6e965824303255cacc1c1a195d3684caa26bce
Author: Sascha Hauer <s.hauer@pengutronix.de>
resource: Let dev_request_mem_region return an error pointer
Introduce dev_request_mem_region_err_null
only used on platform like at91 where the resource address conflicts
with errno PTR.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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To let the driver probe on i.MX6sx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is a combined pincontrol/PHY driver for
the SerDes lanes on Tegra K1.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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New DTs call the initial pinctrl state "boot" in
order to avoid Linux reconfiguring the pinctrl
by default. The bootloader should explicitly set
this state.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For all users fix or add the error check.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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- Remove OFDEVICE dependency from PINCTRL. It won't do
much then, so add a comment to Kconfig when PINCTRL is
selected without OFDEVICE
- Let Architectures only select PINCTRL instead of the
particular driver. Change the drivers to 'default y if $SOC'
to make sure the drivers are still compiled if the corresponding
SoC is selected
This fixes Kconfig warnings like:
warning: (PINCTRL_ARMADA_370 && PINCTRL_ARMADA_XP && PINCTRL_DOVE && PINCTRL_KIRKWOOD) selects PINCTRL which has unmet direct dependencies (OFDEVICE)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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We need to retrieve the device id in device tree/non device tree case.
Signed-off-by: Raphaël Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Other functions use pin_to_controller to retrieve a at91_gpio_chip structure,
so fix pin_to_controller to return the correct value.
Signed-off-by: Raphaël Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This commit adds the driver data for the gpio-at91 driver.
Signed-off-by: Raphaël Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This driver is based on mach-at91/gpio.c and linux pinctrl driver.
The driver contains the gpio and pinctrl parts (like in linux) because the two parts
share some structures and logics.
Signed-off-by: Raphaël Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch modifies the Rockchip pinctrl driver to comply with the new
DT bindings, which use two syscon nodes to specify the address of
memory resources.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds a pinctrl driver for pin muxing on Marvell Armada XP. The
driver is ported from Linux and modified to fit on Barebox's common
mvebu pinctrl driver.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds a pinctrl driver for pin muxing on Marvell Armada 370. The
driver is ported from Linux and modified to fit on Barebox's common
mvebu pinctrl driver.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds pinctrl drivers for Marvell Dove and Kirkwood SoCs based
on a common driver stub. This design is based on the corresponding
Linux driver and should ease additional drivers for Marvell Armada
SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We can reuse the Tegra30 pinctrl driver, as the bit
layout is the same. Just add the pin and drivegroups
and some compile-time magic to avoid bloat.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Access pin and drivegroups through a drvdata pointer.
This allows to insert other groups for SoCs with a
similar bit layout easily.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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These are special groups to configure pad properties
such as drive strength and slew rate for a group of
pads.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When a devicenode has invalid pinctrl settings then printing the
offending node helps debugging it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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